W83194R-81 Datasheet, PDF (3/18 Pages) Winbond – 100MHZ CLOCK FOR SIS CHIPSET

W83194R-81
5.0 PIN DESCRIPTION
IN - Input
OUT - Output
I/O - Bi-directional Pin
# - Active Low
* - Internal 250kΩ pull-up
PRELIMINARY
5.1 Crystal I/O
SYMBOL
Xin
Xout
PIN
I/O
FUNCTION
4
IN Crystal input with internal loading capacitors and
feedback resistors.
5
OUT Crystal output at 14.318MHz nominally.
5.2 CPU, SDRAM, PCI Clock Outputs
SYMBOL
CPUCLK [ 0:2 ]
SDRAM11/
*CPU_STOP#
SDRAM10/
*PCI_STOP#
SDRAM9/
*SDRAM_STOP#
SDRAM8/ *PD#
SDRAM[0:7],
SDRAM12
PCICLK_F/ *FS1
PIN
40,41,43
17
18
20
21
28,29,31,32,34
, 35,37,38,15
7
I/O
OUT
I/O
I/O
I/O
I/O
O
I/O
FUNCTION
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
Vddq2b is the supply voltage for these outputs.
If MODE =1 (default), then this pin is a SDRAM clock
buffered output of the crystal. If MODE = 0 , then this
pin is CPU_STOP# input used in power
management mode for synchronously stopping the
all CPU clocks.
If MODE = 1 (default), then this pin is a SDRAM
clock output. If MODE = 0 , then this pin is
PCI_STOP # and used in power management mode
for synchronously stopping the all PCI clocks.
If MODE = 1 (default), then this pin is a SDRAM
clock output. If MODE = 0 , then this pin is
SDRAM_STOP # and used in power management
mode for stopping the all SDRAM clocks.
If MODE = 1 (default), then this pin is a SDRAM
clock output. If MODE = 0 , then this pin is PD # and
used to power down the device into a power down
state.
SDRAM clock outputs which have the same
frequency as CPU clocks.
Latched input for FS1 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
Free running PCI clock during normal operation.
Publication Release Date: Dec. 1998
-3-
Revision 0.20