W83194R-81 Datasheet, PDF (2/18 Pages) Winbond – 100MHZ CLOCK FOR SIS CHIPSET

W83194R-81
3.0 BLOCK DIAGRAM
SEL24_14#
Xin
Xout
*FS(0:2) ³
*MODE
CPU3.3_2.5#
*SD_SEL#
SDRAM_STOP#
CPU_STOP#
PCI_STOP#
PD#
*SDAT
A*SCLK
PLL2
¡Ò2
XTAL
OSC
PLL1
Spread
Spectrum
STOP
CPU_STOP#
LATCH
5
POR
PCI
clock STOP
Divder
Contro
l Logic
Config
. Reg.
PCI_STOP#
PRELIMINARY
48MHz
SIO
REF(0:2)
3
IOAPIC
CPUCLK(0:2)
3
SDRAM(0:12)
13
PCICLK(0:4)
5
PCICLK_F
4.0 PIN CONFIGURATION
Vdd
1
REF0/ *MODE
2
Vss
3
Xin
4
Xout
5
Vddq4
6
PCICLK_F/ *FS1
7
PCICLK0/ *FS2
8
Vss
9
PCICLK1
10
PCICLK2
11
PCICLK3
12
PCICLK4
13
Vddq4
14
SDRAM12
15
Vss
16
*CPU_STOP#/SDRAM11
17
*PCI_STOP#/SDRAM10
18
Vddq3
19
*SDRAM_STOP#/SDRAM 9
20
*PD#/SDRAM 8
21
Vss
22
*SDATA
*SDCLK
23
24
48
Vddq2
47
IOAPIC
46
REF1/ *SD_SEL#
45
Vss
44
REF2/CPU3.3_2.5#
43
CPUCLK0
42
Vddq2b
41
CPUCLK1
40
CPUCLK
39
2Vss
38
SDRAM 0
37
SDRAM 1
36
Vddq3
35
SDRAM 2
34
SDRAM 3
33
Vss
32
SDRAM 4
31
SDRAM 5
30
Vddq3
29
SDRAM 6
28
SDRAM 7
27
Vss
26
48MHz/*FS0
25
SIO/*SEL24_14#
Publication Release Date: Dec. 1998
-2-
Revision 0.20