W741L250 Datasheet, PDF (21/86 Pages) Winbond – 4-BIT MICROCONTROLLER

W741L250
RC.0
PM0.2
DATA BUS
Signal
change
detector
PEF.0
RC.1
PM0.2
RC.2
PM0.2
RC.3
PM0.2
Signal
change
detector
PEF.1
Signal
change
detector
PEF.2
Signal
change
detector
PEF.3
DQ
ck
R
PSR0.0
DQ
ck
R
PSR0.1
DQ
ck
R
PSR0.2
DQ
ck
R
PSR0.3
DQ
ck
R
EVF.2
HEF.2
IEF.2
HCF.2
INT 2
CLR EVF, #I
Reset
Falling
edge
detector
Falling
edge
detector
Falling
edge
detector
Falling
edge
detector
SEF.0
SEF.1
SEF.2
SEF.3
Reset
MOV PEF, #I
CLR PSR0
Wake up from STOP mode
Output Port RE
Figure 10. Architecture of Input Ports RC
When the MOV RE, R instruction is executed, the data in the RAM will be output to port RE.
Port RE (RE.0 to RE.3) also provides high sink current output.
Port Status Register 0 (PSR0)
Port status register 0 is organized as a 4-bit binary register (PSR0.0 to PSR0.3). PSR0 can be read or
cleared by the MOVA R, PSR0, and CLR PSR0 instructions. The bit descriptions are as follows:
3
2
1
0
PSR0 R
R
R
R
Note: R means read only.
Bit 0 = 1 Signal change on RC.0.
Bit 1 = 1 Signal change on RC.1.
Bit 2 = 1 Signal change on RC.2.
Bit 3 = 1 Signal change on RC.3.
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Publication Release Date: March 1998
Revision A2