W9725G6KB25I-TR Datasheet, PDF (19/87 Pages) Winbond – 4M X 4 BANKS X 16 BIT DDR2 SDRAM

W9725G6KB
CMD
CLK
CLK
ODT
Rtt
EMRS
NOP
NOP
tAOFD
tMOD,min
Old setting
tMOD,max
Updating
NOP
NOP
NOP
tIS
New setting
1) EMRS command directed to EMR(1), which updates the information in EMR(1)[A6,A2], i.e. Rtt (Nominal).
2) "setting" in this diagram is the Register and I/O setting, not what is measured from outside.
Figure 10 – ODT update delay timing - tMOD
However, to prevent any impedance glitch on the channel, the following conditions must be met.
 tAOFD must be met before issuing the EMRS command.
 ODT must remain LOW for the entire duration of tMOD window, until tMOD,max is met.
Now the ODT is ready for normal operation with the new setting, and the ODT signal may be raised
again to turned on the ODT. Following timing diagram shows the proper Rtt update procedure.
CLK
CLK
CMD
ODT
Rtt
tAOFD
Old setting
EMRS
NOP
NOP
NOP
NOP
NOP
tMOD,max
tIS
tAOND
New setting
1) EMRS command directed to EMR(1), which updates the information in EMR(1)[A6,A2], i.e. Rtt (Nominal).
2) "setting" in this diagram is what is measured from outside.
Figure 11 – ODT update delay timing - tMOD, as measured from outside
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Publication Release Date: Sep. 03, 2012
Revision A03