W39V040A Datasheet, PDF (19/34 Pages) Winbond – 512K × 8 CMOS FLASH MEMORY WITH LPC INTERFACE

W39V040A
Timing Waveforms for Programmer Interface Mode, continued
Program Cycle Timing Diagram
A[10:0]
(Internal A[18:0])
DQ[7:0]
Byte Program Cycle
5555
AA
2AAA
55
5555
Programmed Address
A0
Data-In
R/#C
#OE
#WE
T WPH
TWP
Byte 0
Byte 1
Byte 2
Byte 3
Note: The internal address A[18:0] are converted from external Column/Row address
Column/Row Address are mapped to the Low/High order internal address.
i.e. Column Address A[10:0] are mapped to the internal A[10:0],
Row Address A[7:0] are mapped to the internal A[18:11].
TBP
Internal Write Start
#DATA Polling Timing Diagram
A[10:0]
(Internal A[18:0])
An
An
R/#C
#WE
#OE
DQ7
T_OEP
X
X
TBP or TEC
An
An
X
X
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Publication Release Date: December 19, 2002
Revision A2