W83791D Datasheet, PDF (14/46 Pages) Winbond – W83791D Winbond H/W Monitoring IC

W83791D
GPIO4
SPEAKER
LED
SPEECH_SEL
PWMOUT1/
A0
PWMOUT2 /
A1
VID1
VDD (5V)
GNDD
SLOTOCC#
CASEOPEN
VID4
FAN3IN-
FAN1IN
SCL
SDA
PWMOUT3 /
VID_V90
VID2
VID3
9
10
11
12
13
14
15
16
17
18-20
21
22
23
24
25
I/OD_12ts
OUT₁₂
OUT₁₂
IN_ts
OUT₁₂
IN_ts
OUT₁₂
IN_ts
I/ O _{1 2 t s}
POWER
DGROUND
IN_ts
I/O_6ts
I/ O _{1 2 t s}
IN_ts
Preliminary
General purpose I/O function. If pin 9 (SPEECH_SEL) is trapped to high
at VSB power on, this function will be active.
Current type output driving an external speaker. The function is only
working in VDD 5V OK.
LED output control. This is a multi-function pin with SPEAKER. When
the LED_SEL register (Bank0 Index 17h) is set to 1, LED output
function will be active. Otherwise, set to 0 (default), this pin serves as
SPEAKER output.
During VSB 5V power on, this pin is used to trap whether using speech
function or GPIO function.
Trapping low means using speech function (i.e. pin45-48, pin1, pin4-8
are as speech function).
Trapping high means using GPIO function (i.e. pin45-48, pin1, pin4-8
are as GPIO function). The I/O control and status is defined in BANK0
Index 13h~16h.
Fan speed control PWM output. When the power of VDD is 0v, this pin
will drive logic 0. The power of this pin is supplied by VSB 5V.
I²C device address bit0 trapping during 5VSB power on.
Fan speed control PWM output. When the power of VDD is 0v, this pin
will drive logic 0. The power of this pin is supplied by VSB 5V.
I²C device address bit1 trapping during 5VSB power on.
Voltage Supply readouts from CPU. After programming, this pin can be
VID output to voltage regulator to generate Vcore for CPU.
+5V VDD power. Bypass with the parallel combination of 10µF
(electrolytic or tantalum) and 0.1µF (ceramic) bypass capacitors.
Internally connected to all digital circuitry.
CPU presence signal. 0, means CPU is present. 1, means CPU is absent.
CASE OPEN detection. An active high input from an external device
when case is Intruded. This signal can be latched in external circuit
which power is supplied by VBAT, even if W83791D is power off.
Voltage Supply readouts from CPU. After programming, this pin can be
VID output to voltage regulator to generate Vcore for CPU.
0V to +5V amplitude fan tachometer input
IN_ts
I/OD_8ts
OUT₁₂
IN_ts
I/ O _{1 2 t s}
I/ O _{1 2 t s}
Serial Bus Clock.
Serial Bus bi-directional Data.
Fan speed control PWM output. When the power of VDD is 0v, this pin
will drive logic 0. The power of this pin is supplied by VSB 5V.
VID table selection trapping during RSMRST (0: Intel VRM 8.2/8.3; 1:
Intel VRM 9.0). When the trapping pin get a logic 1, the beep warning
function is according to Intel VRM 9.0 VID.
Voltage Supply readouts from CPU. After programming, this pin can be
VID output to voltage regulator to generate Vcore for CPU.
Voltage Supply readouts from CPU. After programming, this pin can be
VID output to voltage regulator to generate Vcore for CPU.
7
Publication Release Date: Aug, 2001
Revision 0.41