W49L201 Datasheet, PDF (14/23 Pages) Winbond – 256K X 8 CMOS FLASH MEMORY

Preliminary W49L201
AC Characteristics, continued
Read Cycle Timing Parameters
(VCC = 3.3V ±10%, VCC = 0V, TA = 0 to 70° C)
PARAMETER
SYM.
W49L201-70
W49L201-90
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
CE Low to Active Output
TRC
70
-
90
-
TCE
-
70
-
90
TAA
-
70
-
90
TOE
-
35
-
45
TCLZ
0
-
0
-
OE Low to Active Output
CE High to High-Z Output
OE High to High-Z Output
TOLZ
0
-
0
-
TCHZ
-
25
-
25
TOHZ
-
25
-
25
Output Hold from Address Change
TOH
0
-
0
-
Note: The parameter of TCLZ, TOLZ, TCHZ, TOHZ are characterized only and is not 100% tested.
Write Cycle Timing Parameters
PARAMETER
Address Setup Time
Address Hold Time
WE and CE Setup Time
WE and CE Hold Time
OE High Setup Time
OE High Hold Time
CE Pulse Width
WE Pulse Width
WE High Width
Data Setup Time
Data Hold Time
Word programming Time
Erase Cycle Time
SYMBOL
TAS
TAH
TCS
TCH
TOES
TOEH
TCP
TWP
TWPH
TDS
TDH
TBC
TEC
MIN.
0
50
0
0
0
0
70
70
100
50
10
-
-
TYP.
-
-
-
-
-
-
-
-
-
-
-
35
100
Note: All AC timing signals observe the following guidelines for determining setup and hold times:
(a) High level signal's reference level is VIH and (b) low level signal's reference level is VIL.
MAX.
-
-
-
-
-
-
-
-
-
-
-
50
200
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
nS
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
µS
mS
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