W25S243A Datasheet, PDF (12/17 Pages) Winbond – 64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM

Preliminary W25S243A
Timing Waveforms, continued
Read/Write Cycle Timing
CLK
ADSP
ADSC
ADV
A[15:0]
GW
BWE
BW[4:1]
CE1
CE2
CE3
OE
Data-Out
Data-In
Single Read
TADSS
TADSH
Single Write
TCYC
TKH _TKL
Burst Read
ADSP is blocked by CE1 inactive
TADCS TADCH
ADSC initiated read
Unselected
TADVS
TADVH
Suspend Burst
TAS TAH
RD1
WR1
TWS TWH
RD2
TWS TWH
TCES TCEH
TWS TWH
WR1
CE1 masks ADSP
TCES TCEH
CE2 and CE3 only sampled with ADSP or ADSC
TCES TCEH
Unselected with CE3
TOE
TOHZ
TOLZ
High-Z
TKLZ
TKQ
High-Z
TOH
1a
TKHZ
TDSTDH
1a
TKX
2a
2b
2c
2d
TKHZ
DON'T CARE
UNDEFINED
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