W25S243A Datasheet, PDF (10/17 Pages) Winbond – 64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM

Preliminary W25S243A
TIMING WAVEFORMS
Read Cycle Timing
CLK
ADSP
ADSC
ADV
A[15:0]
GW
BWE
Single Read
TADSS
TADSH
Burst Read
TCYC
TKH _TKL
ADSP is blocked by CE1 inactive
TADCS TADCH
ADSC initiated read
TADVS
TADVH
Suspend Burst
TAS TAH
RD1
TWS
RD2
TWH
RD3
TWS TWH
Unselected
BW[4:1]
CE1
CE2
CE3
OE
Data-Out
Data-In
TCES
TCEH
CE1 masks ADSP
TCES
TCEH
TCES
TCEH
CE2 and CE3 only sampled with ADSP or ADSC
Unselected with CE2
TOE
TOHZ
TOLZ
TOX
TKX
TKX
High-Z
1a
TKLZ
TKQ
High-Z
2a
2b
2c
2d
3a
TKHZ
DON'T CARE
UNDEFINED
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