W982516BH Datasheet, PDF (10/43 Pages) Winbond – 4M X 4 BANKS X 16 BIT SDRAM

W982516BH
Notes:
1. Operation exceeds "ABSOLUTE MAXIMUM RATING" may cause permanent damage to the
devices.
2. All voltages are referenced to VSS
3. These parameters depend on the cycle rate and listed values are measured at a cycle rate with the
minimum values of t_CK and t_RC.
4. These parameters depend on the output loading conditions. Specified values are obtained with
output open.
5. Power-up sequence is further described in the "Functional Description" section.
6. AC Testing Conditions
Output Reference Level
Output Load
Input Signal Levels
Transition Time (Rise and Fall) of Input Signal
Input Reference Level
1.4V/1.4V
See diagram below
2.4V/0.4V
2 nS
1.4V
output
Z = 50 ohms
1.4 V
50 ohms
50pF
AC TEST LOAD
7. Transition times are measured between VIH and VIL.
8. t_HZ defines the time at which the outputs achieve the open circuit condition and is not referenced to
output level.
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