W3E32M64S-XSBX Datasheet, PDF (7/17 Pages) White Electronic Designs Corporation – 32Mx64 DDR SDRAM

White Electronic Designs
W3E32M64S-XSBX
FIGURE 3 MODE REGISTER DEFINITION
BA1 BA0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address Bus
0*
0*
Operating Mode
* M14 and M13
(BA0 and BA1 must be
"0, 0" to select
the base mode register
(vs. the extended
mode register).
CAS Latency BT Burst Length
Mode Register (Mx)
M2 M1 M0
0 00
0 01
0 10
0 11
1 00
1 01
1 10
1 11
Burst Length
M3 = 0
Reserved
2
4
8
Reserved
Reserved
Reserved
Reserved
M3 = 1
Reserved
2
4
8
Reserved
Reserved
Reserved
Reserved
M3
0
1
M6 M5 M4
0 00
0 01
0 10
0 11
1 00
1 01
1 10
1 11
Burst Type
Sequential
Interleaved
CAS Latency
Reserved
Reserved
2
Reserved
Reserved
Reserved
2.5
Reserved
M12 M11 M10 M9
M8
M7
M6-M0
Operating Mode
0
0
0
0
0
0
Valid
Normal Operation
0
0
0
0
1
0
Valid
Normal Operation/Reset DLL
-
-
-
-
-
-
-
All other states reserved
TABLE 1 – BURST DEFINITION
Burst Starting Column
Length
Address
A0
2
0
1
A1 A0
00
4
01
10
11
A2 A1 A0
000
001
010
8
011
100
101
110
111
Order of Accesses Within a Burst
Type = Sequential Type = Interleaved
0-1
0-1
1-0
1-0
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
0-1-2-3
1-0-3-2
2-3-0-1
3-2-1-0
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
0-1-2-3-4-5-6-7
1-0-3-2-5-4-7-6
2-3-0-1-6-7-4-5
3-2-1-0-7-6-5-4
4-5-6-7-0-1-2-3
5-4-7-6-1-0-3-2
6-7-4-5-2-3-0-1
7-6-5-4-3-2-1-0
NOTES:
1. For a burst length of two, A1-Ai select two-data-element block; A0 selects the
starting column within the block.
2. For a burst length of four, A2-Ai select four-data-element block; A0-1 select the
starting column within the block.
3. For a burst length of eight, A3-Ai select eight-data-element block; A0-2 select the
starting column within the block.
4. Whenever a boundary of the block is reached within a given sequence above, the
following access wraps within the block.
HIGH, the corresponding data inputs will be ignored, and a
WRITE will not be executed to that byte/column location.
PRECHARGE
The PRECHARGE command is used to deactivate the
open row in a particular bank or the open row in all banks.
The bank(s) will be available for a subsequent row access
a specified time (tRP) after the PRECHARGE command is
issued. Except in the case of concurrent auto precharge,
where a READ or WRITE command to a different bank is
allowed as long as it does not interrupt the data transfer
in the current bank and does not violate any other timing
parameters. Input A10 determines whether one or all
banks are to be precharged, and in the case where only
one bank is to be precharged, inputs BA0, BA1 select the
bank. Otherwise BA0, BA1 are treated as “Don’t Care.”
Once a bank has been precharged, it is in the idle state and
must be activated prior to any READ or WRITE commands
being issued to that bank. A PRECHARGE command will
be treated as a NOP if there is no open row in that bank
(idle state), or if the previously open row is already in the
process of precharging.
AUTO PRECHARGE
AUTO PRECHARGE is a feature which performs the
same individual-bank PRECHARGE function described
above, but without requiring an explicit command. This is
accomplished by using A10 to enable AUTO PRECHARGE
July 2006
Rev. 5
7
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