SI8465DB Datasheet, PDF (7/8 Pages) Vishay Siliconix – P-Channel 20-V (D-S) MOSFET

PACKAGE OUTLINE
MICRO FOOT: 4-BUMP (2 x 2, 0.5 mm PITCH)
4 x Ø 0.24 to 0.26 Note 4
Solder Mask ~ Ø 0.25
2
3
Si8465DB
Vishay Siliconix
1
4
Recommended Land
4xØb
Bump Note 2
8465
S
S
XXX
D
G
Mark on Backside of Die
s
e
D
Notes (Unless otherwise specified):
1. All dimensions are in millimeters.
2. Four (4) solder bumps are lead (Pb)-free 95.5Sn/3.8Ag/0.7Cu with diameter ∅ 0.30 mm to 0.32 mm.
3. Backside surface is coated with a Ti/Ni/Ag layer.
4. Non-solder mask defined copper landing pad.
5. • is location of pin 1.
Dim.
A
A₁
A₂
b
e
s
D
Min.
0.462
0.220
0.242
0.300
0.230
0.920
Millimeters^a
Nom.
0.505
0.250
0.255
0.310
0.500
0.250
0.960
Notes:
a. Use millimeters as the primary measurement.
Max.
0.548
0.280
0.268
0.320
0.270
1.000
Min.
0.0181
0.0086
0.0095
0.0118
0.0090
0.0362
Inches
Nom.
0.0198
0.0098
0.0100
0.0122
0.0197
0.0098
0.0378
Max.
0.0215
0.0110
0.0105
0.0126
0.0106
0.0394
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?65363.
Document Number: 65363
S09-1922-Rev. A, 28-Sep-09
www.vishay.com
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