SI4807DY Datasheet, PDF (2/5 Pages) Vishay Siliconix – P-Channel 30:1 Ratio Dual-Gate 30-V (D-S) MOSFET

Si4807DY
Vishay Siliconix
SPECIFICATIONS (T_J = 25_C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Condition
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current^a
Drain-Source On-State Resistance^a
Forward Transconductance^a
Diode Forward Voltage^a
Dynamic^b
V_GS(th)
I_GSS
I_DSS
I_D(on)
r_DS1(on)
r_DS2(on)
g_fs
V_SD
V_DS = V_GS, I_D = –250 mA
V_DS = 0 V, V_GS = "20 V
V_DS = –30 V, V_GS = 0 V
V_DS = –30 V, V_GS = 0 V, T_J = 55_C
(G₁ = G₂) V_DS = –5 V, V_GS = –10 V
(G₁ = G₂) V_GS = –10 V, I_D = –6 A
(G₁ = G₂) V_GS = –4.5 V, I_D = –4.8 A
V_G1S = 0 V, V_G2S = –10 V, I_D = –0.15 A
V_G1S = 0 V, V_G2S = –4.5 V, I_D = –0.1 A
V_DS = –15 V, I_D = –6 A
I_S = –1.25 A, V_GS = 0 V
Total Gate Charge
Q_g
Gate-Source Charge
Q_gs
Gate-Drain Charge
Q_gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
t_d(on)
t_r
t_d(off)
t_f
t_rr
Notes
a. Pulse test; pulse width v 300 ms, duty cycle v 2%.
b. Guaranteed by design, not subject to production testing.
Gate 1
V_DS = –15 V, V_{GS(1, 2)} = –10 V
I_D = –6 A
Gate 2
V_DS = –15 V, V_GS(1) = –0 V
V_GS(2) = –10 V, I_D = –0.15 A
Gate 1
Gate 2
Gate 1
Gate 2
Gate 1
Gate 2
V_DD = –15 V, R_L = 15 W
I_D ^ –1 A, V_GEN = –10 V, R_G = 6 W
I_F = –1.25 A, di/dt = –100 A/ms
Min
–1
–20
Typ Max Unit
V
"100
nA
–1
mA
–5
A
0.028
0.035
0.041
0.054
W
1.05
1.3
1.65
2.2
13
S
0.7
–1.1
V
34
60
2.0
5
6.5
nC
0.5
6.0
0.2
15
25
11
20
52
80
ns
20
35
30
60
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2-2
Document Number: 70643
S-00652—Rev. E, 27-Mar-00