PI354X-00 Datasheet, PDF (32/39 Pages) –

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Figure 66 — GM_LGH(s) Gain/Phase Plot Compensated
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Figure 67 — Lighting Application Loop Gain/Phase Plot
Filter Considerations
The PI354x-00 requires low impedance ceramic input capacitors
(X7R/X5R or equivalent) to ensure proper start up and high
frequency decoupling for the power stage. The PI354x-00
will draw nearly all of the high frequency current from the
low impedance ceramic capacitors when the main high side
MOSFET(s) are conducting. During the time the MOSFET(s) are
off, the input capacitors are replenished from the source. Table
4 shows the recommended input and output capacitors to be
used for the PI354x-00 as well as per capacitor RMS ripple current
and the input and output ripple voltages. Table 5 includes the
recommended input and output ceramic capacitors.
It is very important to verify that the voltage supply source as well
as the interconnecting lines are stable and do not oscillate.
PI354x-00
Input Filter Case 1; Inductive source and local, external,
input decoupling capacitance with negligible ESR
(i.e.: ceramic type):
The voltage source impedance can be modeled as a series R_line
L_line circuit. The high performance ceramic decoupling capacitors
will not significantly damp the network because of their low ESR;
therefore in order to guarantee stability the following conditions
must be verified:
( ) ^{Rline >}
L_line
C + C _{IN_INT}
IN_EXT
• r_{EQ_IN}
(17)
R_line << r_{EQ_IN}
(18)
Where r_{EQ_IN} can be calculated by dividing the lowest line voltage
by the full load input current. It is critical that the line source
impedance be at least an octave lower than the converter’s
dynamic input resistance, Equation (18). However, R_line cannot
be made arbitrarily low otherwise Equation (17) is violated
and the system will show instability, due to an under-damped
RLC input network.
Input Filter case 2; Inductive source and local, external
input decoupling capacitance with significant R_{CIN_EXT} ESR
(i.e.: electrolytic type):
In order to simplify the analysis in this case, the voltage source
impedance can be modeled as a simple inductor L_line.
r > R _{EQ_IN}
CIN_EXT
L_line
C • R _{IN_INT}
CIN_EXT
<
r_{EQ_IN}
(19)
(20)
Notice that the high performance ceramic capacitors C_{IN_INT}
within the PI354x-00 should be included in the external
electrolytic capacitance value for this purpose. The stability
criteria will be:
Equation (20) shows that if the aggregate ESR is too small – for
example by using very high quality input capacitors (C_{IN_EXT}) – the
system will be under-damped and may even become destabilized.
As noted, an octave of design margin in satisfying Equation (19)
should be considered the minimum.
When applying an electrolytic capacitor for input filter damping
the ESR value must be chosen to avoid loss of converter efficiency
and excessive power dissipation in the electrolytic capacitor.
Cool-Power^® ZVS Switching Regulators
Page 32 of 39
Rev 1.6
03/2017
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