TMP92CM27 Datasheet, PDF (469/502 Pages) Toshiba Semiconductor – CMOS 32-Bit Microcontroller

TMP92CM27
(5) Clock control / PLL (1/2)
Symbol
Name
Address
7
SYSCR0
System
Clock
Control 0
10E0H
SYSCR1
System
Clock
Control 1
10E1H
SYSCR2
System
Clock
Control 2
10E2H
-
R/W
0
Always
write “0”
6
5
4
3
2
1
-
R/W
0
0
Always
write “0”
GEAR2 GEAR1
R/W
1
0
Select gear value of
high frequency (fc)
000: fc
001: fc/2
010: fc/4
011: fc/8
100: fc/16
101: (Reserved)
110: (Reserved)
111: (Reserved)
WUPTM1 WUPTM0 HALTM1 HALTM0
R/W
1
0
1
1
Warm-up timer
00: Reserved
01: 2⁸/input frequency
10: 2¹⁴/input frequency
11: 2¹⁶/input frequency
HALT mode
00: Reserved
01: STOP mode
10: IDLE1 mode
11: IDLE2 mode
PLLCR0
PLL
Control 0
PLLCR1
PLL
Control 1
10E8H
10E9H
PLLON
R/W
0
Control
on/off
1: ON
0: OFF
FCSEL
R/W
0
Select fc
clock
0: f_OSCH
1: fPLL
LWUPFG
R
0
Lock up timer
status flag
0: not end
1: end
0
0
GEAR0
0
DRVE
R/W
0
Pin state
control in
STOP
mode
0: I/O off
1: Remains
the state
before
HALT
92CM27 - 413
2005-04-20