TMP92CM27 Datasheet, PDF (390/502 Pages) Toshiba Semiconductor – CMOS 32-Bit Microcontroller

TMP92CM27
(4) Sequential receiving
This example show case of receiving is executed by following setting, and it is executed
2byte sequential receiving.
UNIT: 8bit
LSB first
Baud rate selection: fSYS/8
Synchronous clock edge: Rising
Setting example
ld (pdfc),0x07
ld (pdcr),0x06
; Port setting PD0:HSSI0, PD1:HSSO0, PD2:HSCLK0
; Port setting PD0:HSSI0, PD1:HSSO0, PD2:HSCLK0
ldw (hsc0ct),0x0040
ldw (hsc0md),0x2c43
; Set data length to 8bit
; System clock enable, baud rate selection: fSYS/8
; LSB first, synchronous clock edge setting: set to Rising
set 0x01,(hsc0ct)
; Start sequential receiving
loop1:
bit 0,(hsc0st)
jr z,loop1
; Confirm that receiving data register has receiving data of first byte
; <RFR0>=1 ?
loop2:
bit 2,(hsc0st)
jr z,loop2
; Confirm that receiving data register has receiving data of second byte
; <REND0>=1 ?
res 0x01,(hsc0ct)
; Sequential receiving disable
ld a,(hsc0rd)
; Read receiving data of first byte
loop3:
bit 0,(hsc0st)
jr z,loop3
ld w,(hsc0rd)
HSC0RD
Read pulse
HSCLK output
HSSI0 input
; Confirm that receiving data of second byte is shifted from receiving data
shift register to receiving data register
; <RFR0>=1 ?
; Read receiving data of second byte
HSC0RS data
XX
0x55
HSC0RD data
XX
<RFR0>
<REND0>
0x3A
0x55
Figure 3.12.44 Example of sequential receiving
92CM27-334
2005-04-20