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TMP92CZ26AXBG Datasheet, PDF (437/767 Pages) Toshiba Semiconductor – CMOS 32-Bit Microcontroller
TMP92CZ26A
(c-4) Stage management
The UDC manages each stage of control transfer by hardware.
Each stage is changed by receiving token from USB host, or CPU accesses register.
Each stage in control transfer type has to process combination software. UDC detects
the following contents from 8-byte data in SETUP stage. The stage is managed by
determining control transfer type.
• Whether there is data stage or not
• Data stage direction
Based on these it is determines to be either control read transfer type control write
transfer type, or control write transfer type (No data stage).
Various conditions for changing stage in control transfer are given below.
If receiving token for next stage from host before switching to next stage from state
of internal UDC, NAK handshake is returned and BUSY is informed to USB host. In
all control transfer types, if SETUP token is received from host current transaction is
stopped, and it switches to SETUP stage in the UDC. The CPU receives new
INT_SETUP even if it is processing previous control transfer.
92CZ26A-436
2007-11-13