HN4B102J Datasheet, PDF (4/6 Pages) Toshiba Semiconductor – Transistor Silicon PNP / NPN Epitaxial Type (PCT Process)

NPN
I_C – V_CE
2
20
10
8
1.6
6
1.2
5
4
0.8
3
0.4
0
0
IB = 1 mA
0.4
0.8
2
Common emitter
Ta = 25°C
Single nonrepetitive pulse
1.2
1.6
2
Collector−emitter voltage V_CE (V)
V_{CE (sat)} – I_C
1 _{Common emitter}
I_C/I_B = 30
Single nonrepetitive pulse
0.3
0.1
0.03
0.01
0.001
Ta = 100°C
−55°C
25°C
0.01
0.1
1
10
Collector current I_C (A)
I_C – V_BE
2
Common emitter
VCE = 2 V
Single nonrepetitive pulse
1.6
1.2
Ta = 100°C
−55°C
0.8
0.4
25°C
0
0
0.4
0.8
1.2
1.6
Base−emitter voltage V_BE (V)
4
HN4B102J
1000
300
100
h_FE – I_C
Ta = 100°C
25°C
−55°C
30
Common emitter
VCE = 2 V
Single nonrepetitive pulse
10
0.001
0.01
0.1
1
10
Collector current I_C (A)
V_{BE (sat)} – I_C
10
Common emitter
I_C/I_B = 30
Single nonrepetitive pulse
3
Ta = -55°C
1
100°C
25°C
0.3
0.1
0.001
0.01
0.1
1
10
Collector current I_C (A)
Safe operating area
10
IC max (pulse) *
IC max (pulse) *
100 ms*
IC max
1 (continuous)*
10μs*
100μs*
DC operation
Ta = 25°C
10 s*
*: Single nonrepetitive pulse
0.1
Ta = 25°C
Note that the curves for 100 ms, 10 s and
DC operation will be different when the
devices aren’t mounted on an FR4 board
(glass-epoxy, 1.6 mm thick, Cu area: 645
mm²).
Single-device operation
These characteristic curves must be
derated linearly with increase in
0.01 ^temperature.
0.1
1
10
Collector−emitter voltage V_CE
1 ms*
10 ms*
100
(V)
2009-06-17