TC55VBM316AFTN Datasheet, PDF (3/15 Pages) Toshiba Semiconductor – TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC55VBM316AFTN/ASTN40,55
OPERATING MODE
MODE
CE1 CE2 OE R/W BYTE LB UB I/O1~I/O8
L H LH
L
* * Output
Read
L
H LH
H
L L Output
L
H LH
H
H L High-Z
L
H LH
H
L H Output
L H*L
L
* * Input
Write
L
H *L
H
L L Input
L
H *L
H
H L High-Z
L
H *L
H
L H Input
L H HH
L
* * High-Z
L
H HH
H
L L High-Z
Output Deselect
L
H HH
H
H L High-Z
L
H HH
H
L H High-Z
H * * * H or L * * High-Z
Standby
*
L
* * H or L * * High-Z
*
* **
H
H H High-Z
* = don't care
H = logic high
L = logic low
I/O9~I/O15
High-Z
Output
Output
High-Z
High-Z
Input
Input
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
I/O16
A-1
Output
Output
High-Z
A-1
Input
Input
High-Z
A-1
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
POWER
I_DDO
I_DDO
I_DDO
I_DDO
I_DDO
I_DDO
I_DDO
I_DDO
I_DDO
I_DDO
I_DDO
I_DDO
I_DDS
I_DDS
I_DDS
MAXIMUM RATINGS
SYMBOL
RATING
V_DD
Power Supply Voltage
V_IN
Input Voltage
V_I/O
Input/Output Voltage
P_D
Power Dissipation
T_solder
Soldering Temperature (10s)
T_stg
Storage Temperature
T_opr
Operating Temperature
*: −2.0 V when measured at a pulse width of 20ns
VALUE
−0.3~4.2
−0.3*~4.2
−0.5~V_DD + 0.5
0.6
260
−55~150
−40~85
UNIT
V
V
V
W
°C
°C
°C
DC RECOMMENDED OPERATING CONDITIONS (Ta = −40° to 85°C)
SYMBOL
PARAMETER
V_DD
Power Supply Voltage
V_IH
Input High Voltage
V_DD = 2.3 V~2.7 V
V_DD = 2.7 V~3.6 V
V_IL
Input Low Voltage
V_DH
Data Retention Supply Voltage
*: −2.0 V when measured at a pulse width of 20ns
MIN
2.3
2.0
2.2
−0.3*
1.5
TYP
MAX
UNIT

3.6
V

V_DD + 0.3
V

V_DD × 0.24
V

3.6
V
2002-08-05 3/15