TX4939XBG-400 Datasheet, PDF (281/740 Pages) Toshiba Semiconductor – 64-Bit TX System RISC TX49 Family

TMR
0
TIIS
Interval Timer
TMCPRA Status
Toshiba RISC Processor
TX4939
Interval Timer TMCPRA Match Status (Default: 0)
When in the Interval Timer mode, this bit is set when the counter value
matches Compare Register A n (TMCPRAn).
This bit is cleared by writing a “0” to it.
R/W0C
During Read
0: Did not match the Compare Register
1: Matched the Compare Register
During Write
0: Clear
1: Invalid
13
Rev. 3.1 November 1, 2005
13-13