SSM6J214FE Datasheet, PDF (2/6 Pages) Toshiba Semiconductor – TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSVI)

SSM6J214FE
Electrical Characteristics (Ta = 25°C)
Characteristic
Drain-source breakdown voltage
Drain cut-off current
Gate leakage current
Gate threshold voltage
Forward transfer admittance
Drain–source ON-resistance
Input capacitance
Output capacitance
Reverse transfer capacitance
Switching time
Turn-on time
Turn-off time
Total gate charge
Gate-source charge
Gate-drain charge
Drain-source forward voltage
Symbol
Test Conditions
Min
V _{(BR) DSS} I_D = -10 mA, V_GS = 0 V
-30
V _{(BR) DSX} I_D = -10 mA, V_GS = 8 V
(Note 4) -22
I_DSS V_DS = -30 V, V_GS = 0 V
⎯
I_GSS V_GS = ±10 V, V_DS = 0 V
⎯
V_th
V_DS = -3 V, I_D = -1 mA
-0.5
⏐Y_fs⏐ V_DS = -3 V, I_D = -2.5 A
(Note 3) 5.7
I_D = -3.0 A, V_GS = -10 V
(Note 3) ⎯
R_{DS (ON)} ^{ID = -3.0 A, VGS = -4.5 V}
I_D = -2.5 A, V_GS = -2.5 V
(Note 3) ⎯
(Note 3) ⎯
I_D = -0.5 A, V_GS = -1.8 V
(Note 3) ⎯
C_iss
C_oss
V_DS = -15 V, V_GS = 0 V
f = 1 MHz
⎯
⎯
C_rss
⎯
t_on
V_DD = -15 V, I_D = -2.0 A
⎯
t_off
V_GS = 0 to -4.5 V, R_G = 10 Ω
⎯
Q_g
Q_gs1
Q_gd
V_DD = -15 V, I_D = -3.6 A,
V_GS = -4.5 V
⎯
⎯
⎯
V_DSF I_D = 3.6 A, V_GS = 0 V
(Note 3) ⎯
Typ. Max Unit
⎯
⎯
V
⎯
⎯
V
⎯
-1
μA
⎯
±1
μA
⎯
-1.2
V
11.3 ⎯
S
42.0 50.0
48.0 57.0
mΩ
63.1 77.6
82.1 149.6
560
⎯
80
⎯
pF
65
⎯
15
⎯
ns
75
⎯
7.9
⎯
1.0
⎯
nC
2.6
⎯
0.85 1.2
V
Note 3: Pulse test
Note 4: If a forward bias is applied between gate and source, this device enters V(BR)DSX mode.
Note that the drain-source breakdown voltage is lowered in this mode
Switching Time Test Circuit
(a) Test Circuit
0
IN
OUT
−4.5V
10 μs
V_DD = -15 V
R_G = 10 Ω
Duty ≤ 1%
V_IN: t_r, t_f < 5 ns
Common Source
Ta = 25°C
R_L
V_DD
(b) V_IN
0V
−4.5 V
(c) V_{OUT VDS (ON)}
V_DD
90%
10%
90%
10%
t_r
t_f
t_on
t_off
Notice on Usage
V_th can be expressed as the voltage between gate and source when the low operating current value is I_D = -1 mA for
this product. For normal switching operation, V_{GS (on)} requires a higher voltage than V_th and V_{GS (off)} requires a lower
voltage than V_th. (The relationship can be established as follows: V_{GS (off)} < V_th < V_{GS (on).})
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
Thermal resistance R_{th (ch-a)} and power dissipation P_D vary depending on board material, board area, board thickness
and pad area. When using this device, please take heat dissipation into consideration.
2
2014-03-01