TA1287PG Datasheet, PDF (14/24 Pages) Toshiba Semiconductor – BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC

NOTE
ITEM
A₅
B Gain
(Input to Pin 8)
(Matrix Mode)
SW₉
A
TA1287PG,TA1287FG
TEST CONDITION (UNLESS OTHERWISE SPECIFIED, V_CC = 9 V and Ta = 25 ± 3°C)
SW₁₀
SW MODE
SW₁₁
SW_16A
SW_16B
SW_16C
MEASURING METHOD
1) Calculate gains against each item, in the same way
as NOTE A₁.
A
A
B
B
B
(PAL)
GGRYP : B-IN (pin 8)
to V-OUT (pin 13)
GGYP : B-IN (pin 8)
to Y-OUT (pin 14)
GGBYP : B-IN (pin 8)
to U-OUT (pin 15)
A
B
A
(NTSC, UV)
GGRYN : B-IN (pin 8)
to V-OUT (pin 13)
GGYN : B-IN (pin 8)
to Y-OUT (pin 14)
GGBYN : B-IN (pin 8)
to U-OUT (pin 15)
A
A
A
(NTSC, IQ)
GGRYI : B-IN (pin 8)
to V-OUT (pin 13)
GGYI : B-IN (pin 8)
to Y-OUT (pin 14)
GGBYI : B-IN (pin 8)
to U-OUT (pin 15)
14
2004-08-03