TA1287PG Datasheet, PDF (12/24 Pages) Toshiba Semiconductor – BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC

NOTE
ITEM
A₃
R Gain
(Input to Pin 6)
(Matrix Mode)
SW₉
A
TA1287PG,TA1287FG
TEST CONDITION (UNLESS OTHERWISE SPECIFIED, V_CC = 9 V and Ta = 25 ± 3°C)
SW₁₀
SW MODE
SW₁₁
SW_16A
SW_16B
SW_16C
MEASURING METHOD
1) Calculate gains against each item, in the same way
as NOTE A₁.
(PAL)
A
A
B
B
A
GRRYP : R-IN (pin 6)
to V-OUT (pin 13)
GRYP : R-IN (pin 6)
to Y-OUT (pin 14)
GRBYP : R-IN (pin 6)
to U-OUT (pin 15)
(NTSC, UV)
A
B
A
GRRYN : R-IN (pin 6)
to V-OUT (pin 13)
GRYN : R-IN (pin 6)
to Y-OUT (pin 14)
GRBYN : R-IN (pin 6)
to U-OUT (pin 15)
A
A
A
(NTSC, IQ)
GRRYI : R-IN (pin 6)
to V-OUT (pin 13)
GRYI : R-IN (pin 6)
to Y-OUT (pin 14)
GRBYI : R-IN (pin 6)
to U-OUT (pin 15)
12
2004-08-03