LM3S5B91 Datasheet, PDF (993/1331 Pages) Texas Instruments – Stellaris® LM3S5B91 Microcontroller

Stellaris^® LM3S5B91 Microcontroller
OTG A /
Host
Register 150: USB Transmit Control and Status Endpoint 1 Low
(USBTXCSRL1), offset 0x112
Register 151: USB Transmit Control and Status Endpoint 2 Low
(USBTXCSRL2), offset 0x122
Register 152: USB Transmit Control and Status Endpoint 3 Low
(USBTXCSRL3), offset 0x132
Register 153: USB Transmit Control and Status Endpoint 4 Low
(USBTXCSRL4), offset 0x142
Register 154: USB Transmit Control and Status Endpoint 5 Low
(USBTXCSRL5), offset 0x152
Register 155: USB Transmit Control and Status Endpoint 6 Low
(USBTXCSRL6), offset 0x162
Register 156: USB Transmit Control and Status Endpoint 7 Low
(USBTXCSRL7), offset 0x172
Register 157: USB Transmit Control and Status Endpoint 8 Low
(USBTXCSRL8), offset 0x182
Register 158: USB Transmit Control and Status Endpoint 9 Low
(USBTXCSRL9), offset 0x192
Register 159: USB Transmit Control and Status Endpoint 10 Low
(USBTXCSRL10), offset 0x1A2
Register 160: USB Transmit Control and Status Endpoint 11 Low
(USBTXCSRL11), offset 0x1B2
Register 161: USB Transmit Control and Status Endpoint 12 Low
(USBTXCSRL12), offset 0x1C2
Register 162: USB Transmit Control and Status Endpoint 13 Low
(USBTXCSRL13), offset 0x1D2
Register 163: USB Transmit Control and Status Endpoint 14 Low
(USBTXCSRL14), offset 0x1E2
Register 164: USB Transmit Control and Status Endpoint 15 Low
(USBTXCSRL15), offset 0x1F2
USBTXCSRLn is an 8-bit register that provides control and status bits for transfers through the
currently selected transmit endpoint.
OTG B /
Device
January 20, 2012
993
Texas Instruments-Production Data