LM3S5B91 Datasheet, PDF (3/1331 Pages) Texas Instruments – Stellaris® LM3S5B91 Microcontroller

Stellaris^® LM3S5B91 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 39
About This Document .................................................................................................................... 50
Audience .............................................................................................................................................. 50
About This Manual ................................................................................................................................ 50
Related Documents ............................................................................................................................... 50
Documentation Conventions .................................................................................................................. 51
1
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.3.8
1.3.9
1.4
Architectural Overview .......................................................................................... 53
Overview ...................................................................................................................... 53
Target Applications ........................................................................................................ 55
Features ....................................................................................................................... 55
ARM Cortex-M3 Processor Core .................................................................................... 55
On-Chip Memory ........................................................................................................... 57
External Peripheral Interface ......................................................................................... 58
Serial Communications Peripherals ................................................................................ 60
System Integration ........................................................................................................ 65
Advanced Motion Control ............................................................................................... 69
Analog .......................................................................................................................... 71
JTAG and ARM Serial Wire Debug ................................................................................ 73
Packaging and Temperature .......................................................................................... 74
Hardware Details .......................................................................................................... 74
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
The Cortex-M3 Processor ...................................................................................... 75
Block Diagram .............................................................................................................. 76
Overview ...................................................................................................................... 77
System-Level Interface .................................................................................................. 77
Integrated Configurable Debug ...................................................................................... 77
Trace Port Interface Unit (TPIU) ..................................................................................... 78
Cortex-M3 System Component Details ........................................................................... 78
Programming Model ...................................................................................................... 79
Processor Mode and Privilege Levels for Software Execution ........................................... 79
Stacks .......................................................................................................................... 79
Register Map ................................................................................................................ 80
Register Descriptions .................................................................................................... 81
Exceptions and Interrupts .............................................................................................. 94
Data Types ................................................................................................................... 94
Memory Model .............................................................................................................. 94
Memory Regions, Types and Attributes ........................................................................... 96
Memory System Ordering of Memory Accesses .............................................................. 97
Behavior of Memory Accesses ....................................................................................... 97
Software Ordering of Memory Accesses ......................................................................... 98
Bit-Banding ................................................................................................................... 99
Data Storage .............................................................................................................. 101
Synchronization Primitives ........................................................................................... 102
Exception Model ......................................................................................................... 103
Exception States ......................................................................................................... 104
Exception Types .......................................................................................................... 104
January 20, 2012
3
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