TM4C129DNCZAD Datasheet, PDF (980/1967 Pages) Texas Instruments – Tiva Microcontroller

Advance Encryption Standard Accelerator (AES)
13.4.1.3 Operational Modes Configuration
AES Polling Mode
Main Sequence: AES Polling Mode
Figure 13-12 on page 980 shows AES polling mode. The registers used in AES polling mode are:
■ AES Data RW Plaintext/Ciphertext 0 (AES_DATA_IN_0) registers, offset 0x060 to 0x06C
■ AES Control (AES_CTRL) register, offset 0x050
■ AES Hash Tag Out 0 (AES_TAG_OUT_0), offset 0x070
Figure 13-12. AES Polling Mode
START
Write the 128-bit data to be encrypted/
decrypted AES_DATA _IN_n= xxxx
Is input buffer empty?
yes
AES_CTRL[1] INPUT_READY
no
= 0x1
Write the 128-bit data to be encrypted/
decrypted AES_DATA _IN_n= xxxx
Is result available?
yes
AES _CTRL[0] OUTPUT_READY
no
= 0x1
Read the encrypted/decrypted data
authentication_result = AES_TAG_OUT_n
data_result = AES_DATA _IN_n
END
AES Interrupt Mode
The application can use software interrupts to control the flow of Context In, Context Out, Data In,
and Data Out requests. To enable these interrupts:
980
June 18, 2014
Texas Instruments-Production Data