LM3S613 Datasheet, PDF (93/591 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S613 Microcontroller
3.1.4.3
In current Stellaris microcontroller implementations, the shareability and cache policy attributes do
not affect the system behavior. However, using these settings for the MPU regions can make the
application code more portable. The values given are for typical situations.
MPU Mismatch
When an access violates the MPU permissions, the processor generates a memory management
fault (see “Exceptions and Interrupts” on page 62 for more information). The MFAULTSTAT register
indicates the cause of the fault. See page 125 for more information.
3.2 Register Map
Table 3-7 on page 93 lists the Cortex-M3 Peripheral SysTick, NVIC, MPU and SCB registers. The
offset listed is a hexadecimal increment to the register's address, relative to the Core Peripherals
base address of 0xE000.E000.
Note: Register spaces that are not used are reserved for future or internal use. Software should
not modify any reserved memory address.
Table 3-7. Peripherals Register Map
Offset Name
Type
Reset
Description
System Timer (SysTick) Registers
0x010 STCTRL
R/W
0x0000.0000
0x014 STRELOAD
R/W
0x0000.0000
0x018 STCURRENT
R/WC
0x0000.0000
Nested Vectored Interrupt Controller (NVIC) Registers
0x100 EN0
R/W
0x0000.0000
0x180 DIS0
R/W
0x0000.0000
0x200 PEND0
R/W
0x0000.0000
0x280 UNPEND0
R/W
0x0000.0000
0x300 ACTIVE0
RO
0x0000.0000
0x400 PRI0
R/W
0x0000.0000
0x404 PRI1
R/W
0x0000.0000
0x408 PRI2
R/W
0x0000.0000
0x40C PRI3
R/W
0x0000.0000
0x410 PRI4
R/W
0x0000.0000
0x414 PRI5
R/W
0x0000.0000
0x418 PRI6
R/W
0x0000.0000
0x41C PRI7
R/W
0x0000.0000
0xF00 SWTRIG
WO
0x0000.0000
SysTick Control and Status Register
SysTick Reload Value Register
SysTick Current Value Register
Interrupt 0-29 Set Enable
Interrupt 0-29 Clear Enable
Interrupt 0-29 Set Pending
Interrupt 0-29 Clear Pending
Interrupt 0-29 Active Bit
Interrupt 0-3 Priority
Interrupt 4-7 Priority
Interrupt 8-11 Priority
Interrupt 12-15 Priority
Interrupt 16-19 Priority
Interrupt 20-23 Priority
Interrupt 24-27 Priority
Interrupt 28-29 Priority
Software Trigger Interrupt
See
page
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100
101
102
103
104
104
104
104
104
104
104
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106
July 14, 2014
93
Texas Instruments-Production Data