TMS570LS1227 Datasheet, PDF (92/184 Pages) Texas Instruments – TMS570LS1227 16- and 32-Bit RISC Flash Microcontroller

TMS570LS1227
SPNS192B – OCTOBER 2012 – REVISED FEBRUARY 2015
Table 6-29. EMIF Asynchronous Memory Switching Characteristics^(1)(2)(3)
NO
1
t_{d(TURNAROUND)}
3
t_c(EMRCYCLE)
4
t_{su(EMCEL-EMOEL)}
5
t_{h(EMOEH-EMCEH)}
6
t_{su(EMBAV-EMOEL)}
7
t_{h(EMOEH-EMBAIV)}
8
t_{su(EMAV-EMOEL)}
9
t_{h(EMOEH-EMAIV)}
10 t_w(EMOEL)
11 t_{d(EMWAITH-EMOEH)}
29 t_{su(EMDQMV-EMOEL)}
30 t_{h(EMOEH-EMDQMIV)}
15 t_c(EMWCYCLE)
PARAMETER
Value
MIN
NOM
MAX
Reads and Writes
Turnaround time
(TA)*E - 4
(TA)*E
(TA)*E + 3
Reads
EMIF read cycle time (EW = 0) (RS+RST+RH)* (RS+RST+RH)* (RS+RST+RH)*
E -3
E
E+3
EMIF read cycle time (EW = 1)
(RS+RST+RH+( (RS+RST+RH+( (RS+RST+RH+(
EWC*16))*E -3 EWC*16))*E EWC*16))*E +
3
Output setup time,
EMIF_nCS[4:2] low to
EMIF_nOE low (SS = 0)
(RS)*E-6
(RS)*E
(RS)*E+3
Output setup time,
EMIF_nCS[4:2] low to
EMIF_nOE low (SS = 1)
-6
0
+3
Output hold time, EMIF_nOE
high to EMIF_nCS[4:2] high (SS
= 0)
(RH)*E -3
(RH)*E
(RH)*E + 5
Output hold time, EMIF_nOE
-3
0
+5
high to EMIF_nCS[4:2] high (SS
= 1)
Output setup time,
EMIF_BA[1:0] valid to
EMIF_nOE low
(RS)*E-6
(RS)*E
(RS)*E+3
Output hold time, EMIF_nOE
high to EMIF_BA[1:0] invalid
(RH)*E-3
(RH)*E
(RH)*E+5
Output setup time,
EMIF_ADDR[12:0] valid to
EMIFnOE low
(RS)*E-6
(RS)*E
(RS)*E+3
Output hold time, EMIF_nOE
high to EMIF_ADDR[12:0]
invalid
(RH)*E-3
(RH)*E
(RH)*E+5
EMIF_nOE active low width (EW
= 0)
(RST)*E-3
(RST)*E
(RST)*E+3
EMIF_nOE active low width (EW (RST+(EWC*16 (RST+(EWC*16 (RST+(EWC*16
= 1)
)) *E-3
))*E
)) *E+3
Delay time from EMIF_nWAIT
deasserted to EMIF_nOE high
3E+9
4E
4E+20
Output setup time,
EMIF_nDQM[1:0] valid to
EMIF_nOE low
(RS)*E-6
(RS)*E
(RS)*E+3
Output hold time, EMIF_nOE
high to EMIF_nDQM[1:0] invalid
(RH)*E-3
(RH)*E
(RH)*E+5
Writes
EMIF write cycle time (EW = 0) (WS+WST+WH (WS+WST+WH (WS+WST+WH
)* E-3
)*E
)* E+3
EMIF write cycle time (EW = 1)
(WS+WST+WH (WS+WST+WH (WS+WST+WH
+( EWC*16))*E +(E WC*16))*E +( EWC*16))*E
-3
+3
www.ti.com
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1) TA = Turnaround, RS = Read setup, RST = Read strobe, RH = Read hold, WS = Write setup, WST = Write strobe, WH = Write hold,
MEWC = Maximum external wait cycles. These parameters are programmed through the Asynchronous Bank and Asynchronous Wait
Cycle Configuration Registers. These support the following ranges of values: TA[4–1], RS[16–1], RST[64–1], RH[8–1], WS[16–1],
WST[64–1], WH[8–1], and MEWC[1–256]. See the TMS570LS12x/11x Technical Reference Manual (SPNU515) for more information.
(2) E = EMIF_CLK period in ns.
(3) EWC = external wait cycles determined by EMIF_nWAIT input signal. EWC supports the following range of values. EWC[256–1]. Note
that the maximum wait time before timeout is specified by bit field MEWC in the Asynchronous Wait Cycle Configuration Register. See
the TMS570LS12x/11x Technical Reference Manual (SPNU515) for more information.
92
System Information and Electrical Specifications
Copyright © 2012–2015, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS570LS1227