TMS570LS1227 Datasheet, PDF(106/184 Page) Texas Instruments – TMS570LS1227 16- and 32-Bit RISC Flash Microcontroller

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TMS570LS1227 Datasheet, PDF (106/184 Pages) Texas Instruments – TMS570LS1227 16- and 32-Bit RISC Flash Microcontroller

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TMS570LS1227

SPNS192B â OCTOBER 2012 â REVISED FEBRUARY 2015

www.ti.com

Table 6-36. ESM Channel Assignments (continued)

ERROR Condition

MibADC1 - RAM parity error

Reserved

DCAN1 - RAM parity error

DCAN3 - RAM parity error

DCAN2 - RAM parity error

MibSPI5 - RAM parity error

Reserved

RAM even bank (B0TCM) - correctable ECC error

CPU - self-test failed

RAM odd bank (B1TCM) - correctable ECC error

Reserved

DCC1 - error

CCM-R4 - self-test failed

Reserved

N2HET2 - RAM parity error

FMC - correctable ECC error (Bank 7 access)

FMC - uncorrectable ECC error (Bank 7 access)

IOMM - Access to unimplemented location in IOMM frame, or write access

detected in unprivileged mode

Power domain controller compare error

Power domain controller self-test error

eFuse Controller Error â this error signal is generated when any bit in the eFuse

controller error status register is set. The application can choose to generate an

interrupt whenever this bit is set to service any eFuse controller error conditions.

eFuse Controller - Self Test Error. This error signal is generated only when a self

test on the eFuse controller generates an error condition. When an ECC self test

error is detected, group 1 channel 40 error signal will also be set.

PLL#2 - Slip

Ethernet Controller bus master access error

Reserved

DCC2 - error

Group

Group1

Channels

106 System Information and Electrical Specifications

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