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| TMS570LS1227 Datasheet, PDF (150/184 Pages) Texas Instruments – TMS570LS1227 16- and 32-Bit RISC Flash Microcontroller | |||
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TMS570LS1227
SPNS192B â OCTOBER 2012 â REVISED FEBRUARY 2015
www.ti.com
NOTE
⢠A device must internally provide a hold time of at least 300 ns for the SDA signal
(referred to the VIHmin of the SCL signal) to bridge the undefined region of the falling
edge of SCL.
⢠The maximum th(SDA-SCLL) has only to be met if the device does not stretch the LOW
period (tw(SCLL)) of the SCL signal.
⢠A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the
requirement tsu(SDA-SCLH) ⥠250 ns must then be met. This will automatically be the case if
the device does not stretch the LOW period of the SCL signal. If such a device does
stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line
tr max + tsu(SDA-SCLH).
⢠Cb = total capacitance of one bus line in pF. If mixed with fast-mode devices, faster fall-
times are allowed.
150 Peripheral Information and Electrical Specifications
Copyright © 2012â2015, Texas Instruments Incorporated
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