LM3S5749 Datasheet, PDF (90/947 Pages) Texas Instruments – Stellaris® LM3S5749 Microcontroller

The Cortex-M3 Processor
2.5.3
Table 2-9. Interrupts (continued)
Vector Number
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57-58
59
60
61
62
63
Interrupt Number (Bit
in Interrupt Registers)
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41-42
43
44
45
46
47
Vector Address or
Offset
0x0000.0080
0x0000.0084
0x0000.0088
0x0000.008C
0x0000.0090
0x0000.0094
0x0000.0098
0x0000.009C
0x0000.00A0
0x0000.00A4
0x0000.00A8
-
0x0000.00B0
0x0000.00B4
0x0000.00B8
0x0000.00BC
0x0000.00C0
-
0x0000.00C8
0x0000.00CC
0x0000.00D0
0x0000.00D4
-
0x0000.00DC
0x0000.00E0
-
0x0000.00EC
0x0000.00F0
0x0000.00F4
0x0000.00F8
0x0000.00FC
Description
ADC0 Sequence 2
ADC0 Sequence 3
Watchdog Timer 0
Timer 0A
Timer 0B
Timer 1A
Timer 1B
Timer 2A
Timer 2B
Analog Comparator 0
Analog Comparator 1
Reserved
System Control
Flash Memory Control
GPIO Port F
GPIO Port G
GPIO Port H
Reserved
SSI1
Timer 3A
Timer 3B
I²C1
Reserved
CAN0
CAN1
Reserved
Hibernation Module
USB
PWM Generator 3
µDMA Software
µDMA Error
Exception Handlers
The processor handles exceptions using:
■ Interrupt Service Routines (ISRs). Interrupts (IRQx) are the exceptions handled by ISRs.
■ Fault Handlers. Hard fault, memory management fault, usage fault, and bus fault are fault
exceptions handled by the fault handlers.
■ System Handlers. NMI, PendSV, SVCall, SysTick, and the fault exceptions are all system
exceptions that are handled by system handlers.
90
November 17, 2011
Texas Instruments-Production Data