LM3S5749 Datasheet, PDF (738/947 Pages) Texas Instruments – Stellaris® LM3S5749 Microcontroller

Universal Serial Bus (USB) Controller
Register 56: USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1),
offset 0x113
Register 57: USB Transmit Control and Status Endpoint 2 High (USBTXCSRH2),
offset 0x123
Register 58: USB Transmit Control and Status Endpoint 3 High (USBTXCSRH3),
offset 0x133
Host
USBTXCSRHn is an 8-bit register that provides additional control for transfers through the currently
selected transmit endpoint.
Device
Host Mode
USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1)
Base 0x4005.0000
Offset 0x113
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
AUTOSET reserved MODE DMAEN FDT DMAMOD DTWE
DT
Type R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit/Field
7
Name
AUTOSET
Type
R/W
Reset
0
Description
Auto Set
Value Description
0 The TXRDY bit must be set manually.
1 Enables the TXRDY bit to be automatically set when data of the
maximum packet size (value in USBTXMAXPn) is loaded into
the transmit FIFO. If a packet of less than the maximum packet
size is loaded, then the TXRDY bit must be set manually.
6
reserved
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
5
MODE
R/W
0
Mode
Value Description
0 Enables the endpoint direction as RX.
1 Enables the endpoint direction as TX.
Note: This bit only has an effect when the same endpoint FIFO is
used for both transmit and receive transactions.
738
November 17, 2011
Texas Instruments-Production Data