TMS320C6472EZTZ7 Datasheet, PDF (9/269 Pages) Texas Instruments – TMS320C6472 Fixed-Point Digital Signal Processor

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TMS320C6472
SPRS612G – JUNE 2009 – REVISED JULY 2011
• Instruction Set Enhancements - As noted above, there are new instructions such as 32-bit
multiplications, complex multiplications, packing, sorting, bit manipulation, and 32-bit Galois field
multiplication.
• Exception Handling - Intended to aid the programmer in isolating bugs. The C64x+ CPU is able to
detect and respond to exceptions, both from internally detected sources (such as illegal op-codes) and
from system events (such as a watchdog time expiration).
• Privilege - Defines user and supervisor modes of operation, allowing the operating system to give a
basic level of protection to sensitive resources. Local memory is divided into multiple pages, each with
read, write, and execute permissions.
• Time-Stamp Counter - Primarily targeted for Real-Time Operating System (RTOS) robustness, a
free-running time-stamp counter is implemented in the CPU which is not sensitive to system stalls.
For more details on the C64x+ CPU and its enhancements over the C64x architecture, see the following
documents:
• TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732)
• TMS320C64x+ DSP Cache User's Guide (literature number SPRU862)
• TMS320C64x+ DSP Megamodule Reference Guide (literature number SPRU871)
• TMS320C64x Technical Overview (literature number SPRU395)
• TMS320C64x to TMS320C64x+ CPU Migration Guide (literature number SPRAA84)
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