TMS320C6472EZTZ7 Datasheet, PDF (5/269 Pages) Texas Instruments – TMS320C6472 Fixed-Point Digital Signal Processor

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1 Features ................................................... 1
1.1 CTZ/ZTZ BGA Package (Bottom View) .............. 2
1.2 Description ........................................... 3
1.3 Functional Block Diagram ............................ 4
Revision History .............................................. 6
2 Device Overview ........................................ 7
2.1 Device Characteristics ............................... 7
2.2 CPU (DSP Core) Description ........................ 8
2.3 Memory Map Summary ............................. 11
2.4 Boot Mode Sequence .............................. 14
2.5 Pin Assignments .................................... 19
2.6 Signal Groups Description .......................... 23
2.7 Terminal Functions ................................. 29
2.8 Development ........................................ 53
2.9 Community Resources ............................. 58
3 Device Configuration ................................. 59
3.1 Device Configuration at Device Reset .............. 59
3.2 Device Configuration Register Descriptions ........ 60
3.3 Peripheral Selection After Device Reset ........... 63
3.4 Device Status Register (DEVSTAT) ................ 73
3.5 RMIIn Reset Registers (RMIIRESET0 and
RMIIRESET1) ...................................... 74
3.6 Memory Privilege Registers ........................ 75
3.7 Host and Inter-DSP Interrupt Registers ............ 78
3.8 Timer Event Manager Registers .................... 83
3.9 Reset and Boot Registers .......................... 85
3.10 JTAG ID Register Description ...................... 89
3.11 Silicon Revision ID Register Description ........... 89
4 System Interconnect .................................. 90
4.1 Internal Buses, Bridges, and Switch Fabrics ....... 90
4.2 Data Switch Fabric Connections ................... 91
4.3 Priority Allocation ................................... 94
4.4 Configuration Switch Fabric ........................ 94
5 C64x+ Megamodule ................................... 96
5.1 Memory Architecture ............................... 96
5.2 Memory Protection Support ....................... 100
5.3 Bandwidth Management .......................... 101
TMS320C6472
SPRS612G – JUNE 2009 – REVISED JULY 2011
5.4 Power-Down Control .............................. 102
5.5 Megamodule Resets .............................. 102
5.6 Megamodule Revision ............................. 103
5.7 C64x+ Megamodule Register Descriptions ....... 104
5.8 CPU Revision ID .................................. 112
6 Device Operating Conditions ...................... 113
6.1 Absolute Maximum Ratings Over Operating Case
Temperature Range (Unless Otherwise Noted)
..................................................... 113
6.2 Recommended Operating Conditions ............. 114
6.3 Electrical Characteristics Over Recommended
Ranges of Supply Voltage and Operating Case
Temperature (Unless Otherwise Noted) .......... 116
7 C64x+ Peripheral Information and Electrical
Specifications ......................................... 118
7.1 Parameter Information ............................ 118
7.2 Recommended Clock and Control Signal Transition
Behavior ........................................... 119
7.3 Power Supplies .................................... 119
7.4 Power and Sleep Controller (PSC) ................ 121
7.5 Enhanced Direct Memory Access (EDMA3)
Controller .......................................... 124
7.6 Interrupts .......................................... 137
7.7 Reset Controller ................................... 141
7.8 PLL1 and PLL1 Controller ......................... 149
7.9 PLL2 and PLL2 Controller ......................... 161
7.10 PLL3 and PLL3 Controller ......................... 172
7.11 DDR2 Memory Controller ......................... 176
7.12 I2C Peripheral ..................................... 178
7.13 Host-Port Interface (HPI) Peripheral .............. 183
7.14 TSIP ............................................... 190
7.15 Ethernet MAC (EMAC) ............................ 216
7.16 Timers ............................................. 237
7.17 UTOPIA ........................................... 243
7.18 Serial RapidIO (SRIO) Port ....................... 248
7.19 General-Purpose Input/Output (GPIO) ............ 259
7.20 Emulation Features and Capability ............... 261
8 Mechanical Data ...................................... 264
8.1 Thermal Data ...................................... 264
8.2 Packaging Information ............................ 264
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