DRV8806 Datasheet, PDF (9/18 Pages) Texas Instruments – QUAD SERIAL INTERFACE LOW-SIDE DRIVER IC

DRV8806
www.ti.com
SLVSBA3 – JUNE 2012
Daisy-Chain Connection
Two or more DRV8806 devices may be connected together to use a single serial interface. The SDATOUT pin of
the first device in the chain is connected to the SDATIN pin of the next device. The SCLK, LATCH, RESET, and
nFAULT pins are connected together.
+
DRV8806 “A”
+
SDATIN
SCLK
LATCH
RESET
SDATIN
SCLK
LATCH
RESET
SDATOUT
nFAULT
nFAULT
DRV8806 “B”
SDATIN
SCLK
LATCH
RESET
SDATOUT
nFAULT
SDATOUT
Figure 4. Daisy-Chain Connection
Figure 5 shows an example of a serial transaction, writing the output bits, and then reading the fault status bits,
using two devices connected together in a daisy-chain.
Note that the LATCH signal must be high for a minimum of 200 ns before valid data can be clocked out.
LATCH
SCLK
1
2
3
4
5
6
7
8
Fault data latched
1
2
3
4
5
6
7
8
SDATI
OUTB4 OUTB3 OUTB2 OUTB1 OUTA4 OUTA3 OUTA2 OUTA1
SDATO
PREVIOUS WRITE DATA
FLTB4 FLTB3 FLTB2 FLTB1 FLTA4 FLTA3 FLTA2 FLTA1
OUTx
OLD OUTPUT
NEW OUTPUT
Figure 5. Daisy-Chain Serial Transaction
nENBL and RESET Operation
The nENBL pin enables or disables the output drivers. nENBL must be low to enable the outputs. nENBL does
not affect the operation of the serial interface logic. Note that nENBL has an internal pulldown.
The RESET pin, when driven active high, resets internal logic, including the OCP fault. All serial interface
registers are cleared. Note that RESET has an internal pulldown. An internal power-up reset is also provided, so
it is not required to drive RESET at power-up.
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): DRV8806
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