DRV8806 Datasheet, PDF (3/18 Pages) Texas Instruments – QUAD SERIAL INTERFACE LOW-SIDE DRIVER IC

DRV8806
www.ti.com
SLVSBA3 – JUNE 2012
Table 1. TERMINAL FUNCTIONS
NAME
PIN
(HTSSOP)
POWER AND GROUND
GND
5, 12, PPAD
VM
1
CONTROL
nENBL
8
RESET
9
I/O ⁽¹⁾
-
-
I
I
DESCRIPTION
Device ground
Device power supply
Enable input
Reset input
LATCH
SDATIN
SDATOUT
SCLK
STATUS
nFAULT
OUTPUT
OUT1
OUT2
OUT3
OUT4
VCLAMP
11
I
Latch input
14
I
Serial data input
15
OD Serial data output
13
I
Serial clock
16
OD Fault
3
O
Output 1
4
O
Output 2
6
O
Output 3
7
O
Output 4
2
-
Output clamp voltage
EXTERNAL COMPONENTS
OR CONNECTIONS
All pins must be connected to GND.
Connect to motor supply (8.2 V - 40 V).
Active low enables outputs – internal pulldown
Active-high reset input initializes internal logic –
internal pulldown
Rising edge latches shift register to output stage,
falling edge latches fault data into output shift
register – internal pulldown
Serial data input – internal pulldown
Serial data output - open drain output - internal
pullup
Serial clock input – internal pulldown
Logic low when in fault condition (overtemp,
overcurrent, open load) - open drain output
Connect to load 1
Connect to load 2
Connect to load 3
Connect to load 4
Connect to VM supply, or zener diode to VM
supply
(1) Directions: I = input, O = output, OD = open-drain output
PWP (HTSSOP) PACKAGE
(TOP VIEW)
VM 1
VCLAMP 2
OUT1 3
OUT2 4
GND 5
OUT3 ⁶
OUT4 ⁷
nENBL ⁸
16 _nFAULT
15 _SDATOUT
14 _SDATIN
13 _SCLK
GND
12 _GND
11 _LATCH
10 _NC
9 _RESET
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): DRV8806
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