DRV8806 Datasheet, PDF (7/18 Pages) Texas Instruments – QUAD SERIAL INTERFACE LOW-SIDE DRIVER IC

DRV8806
www.ti.com
FUNCTIONAL DESCRIPTION
SLVSBA3 – JUNE 2012
Output Drivers
The DRV8806 contains four protected low-side drivers. Each output has an integrated clamp diode connected to
a common pin, VCLAMP.
VCLAMP can be connected to the main power supply voltage, VM. It can also be connected to a zener or TVS
diode to VM, allowing the switch voltage to exceed the main supply voltage VM. This connection can be
beneficial when driving loads that require very fast current decay, such as unipolar stepper motors.
In all cases, the voltage on the outputs must not be allowed to exceed the maximum output voltage specification.
Serial Interface Operation
The DRV8806 is controlled with a simple serial interface. Logically, the interface is shown in Figure 2.
nENBL
LATCH
RESET
SCLK
SDATIN
SDATOUT
D
Q
CLR
D
Q
CLR
D
Q
CLR
D
Q
CLR
D
Q
CLR
D
Q
CLR
4.5V
D
Q
CLR
D
Q
CLR
D
Q
CLR
0
from fault register
1
Figure 2. Serial Interface Operation
OUT1
OUT2
OUT3
OUT4
Data is shifted into a temporary holding shift register in the part using the SDATIN pin, one bit at each rising
edge of the SCLK pin, while LATCH is low. Data is shifted from the last bit to the SDATOUT pin, so multiple
devices may be daisy-chained together using a single serial interface.
Note that the SDATOUT pin has a weak pullup to an internal 4.5-V power supply, which can support driving
another DRV8806 SDATIN pin at clock frequencies of up to 1 MHz without an external pullup. To operate at
faster than 1-MHz clock frequency or to interface to devices operating at other supply voltages, a pullup resistor
of approximately 1 kΩ to the chosen logic supply voltage should be used.
A rising edge on the LATCH pin latches the data from the temporary shift register into the output stage.
Copyright © 2012, Texas Instruments Incorporated
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