TMS320F28069_1107 Datasheet, PDF (81/172 Pages) Texas Instruments – Piccolo Microcontrollers

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TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698B – NOVEMBER 2010 – REVISED JULY 2011
Eight PIE block interrupts are grouped into one CPU interrupt. In total, 12 CPU interrupt groups, with
8 interrupts per group equals 96 possible interrupts. Table 6-11 shows the interrupts used by 2806x
devices.
The TRAP #VectorNumber instruction transfers program control to the interrupt service routine
corresponding to the vector specified. TRAP #0 attempts to transfer program control to the address
pointed to by the reset vector. The PIE vector table does not, however, include a reset vector. Therefore,
TRAP #0 should not be used when the PIE is enabled. Doing so will result in undefined behavior.
When the PIE is enabled, TRAP #1 through TRAP #12 will transfer program control to the interrupt service
routine corresponding to the first vector within the PIE group. For example: TRAP #1 fetches the vector
from INT1.1, TRAP #2 fetches the vector from INT2.1, and so forth.
INT1
INT2
INT11
INT12
IFR[12:1]
(Flag)
IER[12:1]
(Enable)
INTM
MUX
1
0
Global
Enable
CPU
INTx _MUX
PIEACKx
(Enable/Flag)
(Enable)
PIEIERx[8:1]
(Flag)
PIEIFRx[8:1]
INTx.1
INTx.2
INTx.3
INTx.4
INTx.5
INTx.6
INTx.7
INTx.8
Figure 6-11. Multiplexing of Interrupts Using the PIE Block
From
Peripherals
or
External
Interrupts
Copyright © 2010–2011, Texas Instruments Incorporated
Peripheral and Electrical Specifications
81
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