MSP430FR4133 Datasheet, PDF (8/101 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR4133, MSP430FR4132, MSP430FR4131
SLAS865B – OCTOBER 2014 – REVISED AUGUST 2015
Figure 4-2 shows the pinout of the 56-pin DGG package.
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P7.5/L5
1
P7.4/L4
2
P7.3/L3
3
P7.2/L2
4
P7.1/L1
5
P7.0/L0
6
P4.7/R13
7
P4.6/R23
8
P4.5/R33
9
P4.4/LCDCAP1
10
P4.3/LCDCAP0
11
P4.2/XOUT
12
P4.1/XIN
13
DVSS
14
DVCC
15
RST/NMI/SBWTDIO
16
TEST/SBWTCK
17
P4.0/TA1.1
18
P8.3/TA1.2
19
P8.2/TA1CLK
20
P1.7/TA0.1/TDO/A7
21
P1.6/TA0.2/TDI/TCLK/A6
22
P1.5/TA0CLK/TMS/A5
23
P1.4/MCLK/TCK/A4/VREF+
24
P1.3/UCA0STE/A3
25
P1.2/UCA0CLK/A2
26
P1.1/UCA0RXD/UCA0SOMI/A1/Veref+
27
P1.0/UCA0TXD/UCA0SIMO/A0/Veref–
28
56
P3.0/L8
55
P3.1/L9
54
P3.2/L10
53
P3.3/L11
52
P3.4/L12
51
P3.5/L13
50
P3.6/L14
49
P3.7/L15
48
P6.0/L16
47
P6.1/L17
46
P6.2/L18
45
P6.3/L19
44
P6.4/L20
43
P6.5/L21
42
P2.0/L24
41
P2.1/L25
40
P2.2/L26
39
P2.3/L27
38
P2.4/L28
37
P2.5/L29
36
P2.6/L30
35
P2.7/L31
34
P5.0/UCB0STE/L32
33
P5.1/UCB0CLK/L33
32
P5.2/UCB0SIMO/UCB0SDA/L34
31
P5.3/UCB0SOMI/UCB0SCL/L35
30
P5.4/L36
29
P5.5/L37
Figure 4-2. 56-Pin DGG (TSSOP) (Top View)
8
Terminal Configuration and Functions
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