MSP430FR4133 Datasheet, PDF (72/101 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR4133, MSP430FR4132, MSP430FR4131
SLAS865B – OCTOBER 2014 – REVISED AUGUST 2015
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Table 6-35. CRC Registers (Base Address: 01C0h)
REGISTER DESCRIPTION
CRC data input
CRC data input reverse byte
CRC initialization and result
CRC result reverse byte
REGISTER
CRC16DI
CRCDIRB
CRCINIRES
CRCRESR
OFFSET
00h
02h
04h
06h
Table 6-36. WDT Registers (Base Address: 01CCh)
REGISTER DESCRIPTION
Watchdog timer control
REGISTER
WDTCTL
OFFSET
00h
Table 6-37. Port P1, P2 Registers (Base Address: 0200h)
REGISTER DESCRIPTION
REGISTER
OFFSET
Port P1 input
P1IN
00h
Port P1 output
P1OUT
02h
Port P1 direction
P1DIR
04h
Port P1 pulling register enable
P1REN
06h
Port P1 selection 0
P1SEL0
0Ah
Port P1 interrupt vector word
P1IV
0Eh
Port P1 interrupt edge select
P1IES
18h
Port P1 interrupt enable
P1IE
1Ah
Port P1 interrupt flag
P1IFG
1Ch
Port P2 input
P2IN
01h
Port P2 output
P2OUT
03h
Port P2 direction
P2DIR
05h
Port P2 pulling register enable
Port P2 selection 0⁽¹⁾
P2REN
07h
P2SEL0
0Bh
Port P2 interrupt vector word
P2IV
1Eh
Port P2 interrupt edge select
P2IES
19h
Port P2 interrupt enable
P2IE
1Bh
Port P2 interrupt flag
P2IFG
1Dh
(1) Port P2 selection register does not feature any valid bits. P2SEL0 presents for 16-bit Port A operation with P1SEL0.
Table 6-38. Port P3, P4 Registers (Base Address: 0220h)
REGISTER DESCRIPTION
REGISTER
OFFSET
Port P3 input
P3IN
00h
Port P3 output
P3OUT
02h
Port P3 direction
P3DIR
04h
Port P3 pulling register enable
Port P3 selection 0⁽¹⁾
P3REN
06h
P3SEL0
0Ah
Port P4 input
P4IN
01h
Port P4 output
P4OUT
03h
Port P4 direction
P4DIR
05h
Port P4 pulling register enable
P4REN
07h
Port P4 selection 0
P4SEL0
0Bh
(1) Port P3 selection register does not feature any valid bits. P3SEL0 presents for 16-bit Port B operation with P4SEL0.
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Detailed Description
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