MSP430FR4133 Datasheet, PDF (44/101 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR4133, MSP430FR4132, MSP430FR4131
SLAS865B – OCTOBER 2014 – REVISED AUGUST 2015
www.ti.com
PORT PIN
P8.2
P4.0
P8.3
Table 6-11. Timer1_A3 Signal Connections
DEVICE INPUT
SIGNAL
TA1CLK
ACLK (internal)
SMCLK (internal)
Timer0_A3 CCR2B
output (internal)
Timer0_A3 CCR0B
output (internal)
DVSS
DVCC
TA1.1
Timer0_A3 CCR1B
output (internal)
DVSS
DVCC
TA1.2
Timer0_A3 CCR2B
output (internal)
DVSS
DVCC
MODULE INPUT
NAME
TACLK
ACLK
SMCLK
INCLK
CCI0A
CCI0B
GND
VCC
CCI1A
CCI1B
GND
VCC
CCI2A
CCI2B
GND
VCC
MODULE BLOCK
MODULE OUTPUT
SIGNAL
Timer
N/A
CCR0
TA0
CCR1
TA1
CCR2
TA2
DEVICE OUTPUT
SIGNAL
TA1.1
to ADC trigger
TA1.2
IR Input
The interconnection of Timer0_A3 and Timer1_A3 can be used to modulate the eUSCI_A pin of
UCA0TXD/UCA0SIMO in either ASK or FSK mode, with which a user can easily acquire a modulated
infrared command for directly driving an external IR diode. The IR functions are fully controlled by SYS
configuration registers 1 including IREN (enable), IRPSEL (polarity select), IRMSEL (mode select),
IRDSEL (data select), and IRDATA (data) bits. For more information, refer to the SYS chapter in the
MSP430FR4xx and MSP430FR2xx Family User's Guide (SLAU445).
44
Detailed Description
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