MSP430FR4133 Datasheet, PDF (76/101 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR4133, MSP430FR4132, MSP430FR4131
SLAS865B – OCTOBER 2014 – REVISED AUGUST 2015
Table 6-47. LCD Registers (Base Address: 0600h) (continued)
REGISTER DESCRIPTION
Blinking memory for Static and 2 to 4 mux modes
LCD blinking memory 0
LCD blinking memory 1
⋮
LCD blinking memory 19
Reserved ⁽¹⁾
⋮
Reserved ⁽¹⁾
Display memory for 5 to 8 mux modes
LCD memory 0
LCD memory 1
LCD memory 2
⋮
LCD memory 39
Reserved ⁽²⁾
⋮
Reserved ⁽²⁾
REGISTER
LCDBM0
LCDBM1
⋮
LCDBM19
⋮
LCDM0
LCDM1
LCDM2
⋮
LCDM39
⋮
(2) In 5-mux to 8-mux modes, LCD memory and blink memory 40 to 63 are not physically implemented.
Table 6-48. Backup Memory Registers (Base Address: 0660h)
REGISTER DESCRIPTION
Backup Memory 0
Backup Memory 1
Backup Memory 2
Backup Memory 3
Backup Memory 4
Backup Memory 5
Backup Memory 6
Backup Memory 7
Backup Memory 8
Backup Memory 9
Backup Memory 10
Backup Memory 11
Backup Memory 12
Backup Memory 13
Backup Memory 14
Backup Memory 15
REGISTER
BAKMEM0
BAKMEM1
BAKMEM2
BAKMEM3
BAKMEM4
BAKMEM5
BAKMEM6
BAKMEM7
BAKMEM8
BAKMEM9
BAKMEM10
BAKMEM11
BAKMEM12
BAKMEM13
BAKMEM14
BAKMEM15
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OFFSET
40h
41h
⋮
53h
54h
⋮
5Fh
20h
21h
22h
⋮
47h
48h
⋮
5Fh
OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h
16h
18h
1Ah
1Ch
1Eh
76
Detailed Description
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