LP3954 Datasheet, PDF (8/60 Pages) National Semiconductor (TI) – Advanced Lighting Management Unit

LP3954
SNVS340D – JUNE 2005 – REVISED MARCH 2013
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Modes of Operation
RESET: In the RESET mode all the internal registers are reset to the default values and the chip goes to
STANDBY mode after reset. NSTBY control bit is low after reset by default. Reset is entered always if
Reset Register is written or internal Power On Reset is active. There is no dedicated Reset pin available.
LP3954 can be reset by writing any data to Reset Register in address 60H. Power On Reset (POR) will
activate during the chip startup or when the supply voltage VDD2 falls below 1.5V. Once VDD2 rises
above 1.5V, POR will inactivate and the chip will continue to the STANDBY mode.
STANDBY: The STANDBY mode is entered if the register bit NSTBY is LOW. This is the low power
consumption mode, when all circuit functions are disabled. Registers can be written in this mode and the
control bits are effective immediately after power up.
STARTUP: When NSTBY bit is written high, the INTERNAL STARTUP SEQUENCE powers up all the needed
internal blocks (Vref, Bias, Oscillator etc..). To ensure the correct oscillator initialization, a 10ms delay is
generated by the internal state-machine. If the chip temperature rises too high, the Thermal Shutdown
(THSD) disables the chip operation and STARTUP mode is entered until no thermal shutdown event is
present.
BOOST STARTUP: Soft start for boost output is generated in the BOOST STARTUP mode. The boost output is
raised in PFM mode during the 10ms delay generated by the state-machine. The Boost startup is entered
from Internal Startup Sequence if EN_BOOST is HIGH or from Normal mode when EN_BOOST is written
HIGH. During the 10ms Boost Startup time all LED outputs are switched off to ensure smooth start-up.
NORMAL: During NORMAL mode the user controls the chip using the Control Registers. The registers can be
written in any sequence and any number of bits can be altered in a register in one write
RESET
POR = L
Reset Register write
or POR = H
STANDBY
NSTBY = H
NSTBY = L
INTERNAL
STARTUP
SEQUENCE
THSD = H
VREF = 95% OK*
~10 ms Delay
EN_BOOST = H*
EN_BOOST = L*
BOOST STARTUP
EN_BOOST
rising edge*
~10 ms Delay
NORMAL MODE
* THSD = L
Figure 1. Modes of Operation
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