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LP3954 Datasheet, PDF (44/60 Pages) National Semiconductor (TI) – Advanced Lighting Management Unit
LP3954
SNVS340D – JUNE 2005 – REVISED MARCH 2013
www.ti.com
ADDR
(HEX)
58
59
5A
5B
5C
5D
5E
5F
60
Table 3. LP3954 Control Register Names and Default Values (continued)
REGISTER
Command 5A
Command 5B
Command 6A
Command 6B
Command 7A
Command 7B
Command 8A
Command 8B
Reset
D7
D6
r[2:0]
0
0
cet[1:0]
0
0
r[2:0]
0
0
cet[1:0]
0
0
r[2:0]
0
0
cet[1:0]
0
0
r[2:0]
0
0
cet[1:0]
0
0
D5
D4
D3
D2
g[2:0]
0
0
0
0
b[2:0]
0
0
0
0
g[2:0]
0
0
0
0
b[2:0]
0
0
0
0
g[2:0]
0
0
0
0
b[2:0]
0
0
0
0
g[2:0]
0
0
0
0
b[2:0]
0
0
0
0
Writing any data to Reset Register resets LP3954
D1
D0
cet[3:2]
0
0
tt[2:0]
0
0
cet[3:2]
0
0
tt[2:0]
0
0
cet[3:2]
0
0
tt[2:0]
0
0
cet[3:2]
0
0
tt[2:0]
0
0
LP3954 Registers
REGISTER BIT EXPLANATIONS
Each register is shown with a key indicating the accessibility of the each individual bit, and the initial condition:
Register Bit Accessibility and Initial Condition
Key
rw
r
–0,–1
Bit Accessibility
Read/write
Read only
Condition after POR
RGB CTRL (00H) – RGB LEDS CONTROL REGISTER
D7
cc_rgb1
rw-1
D6
cc_rgb2
rw-1
D5
r1sw
rw-0
D4
g1sw
rw-0
D3
b1sw
rw-0
D2
r2sw
rw-0
D1
g2sw
rw-0
D0
b2sw
rw-0
cc_rgb1
cc_rgb2
r1sw
g1sw
b1sw
r2sw
g2sw
b2sw
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0 - R1, G1 and B1 are constant current sinks, current limited internally
1 - R1, G1 and B1 are switches, limit current with external ballast resistor
0 – R2, G2 and B2 are constant current sinks, current limited internally
1 – R2, G2 and B2 are switches, limit current with external ballast resistor
0 – R1 disabled
1 – R1 enabled
0 – G1 disabled
1 – G1 enabled
0 – B1 disabled
1 – B1 enabled
0 – R2 disabled
1 – R2 enabled
0 – G2 disabled
1 – G2 enabled
0 – B2 disabled
1 – B2 enabled
44
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