AM3715_17 Datasheet, PDF (79/280 Pages) Texas Instruments – Sitara ARM Microprocessors

AM3715, AM3703
www.ti.com
SPRS616F – JUNE 2010 – REVISED AUGUST 2011
Table 2-3. Ball Characteristics (CUS Pkg.)⁽¹⁾ (continued)
BALL
PIN NAME [2]
NUMBER [1]
MODE [3] TYPE [4]
hsusb2_stp
3
gpio_25
4
mm2_rxdp
5
hw_dbg13
7
AC10
etk_d12
0
hsusb2_dir
3
gpio_26
4
hw_dbg14
7
AD11
etk_d13
0
hsusb2_nxt
3
gpio_27
4
mm2_rxdm
5
hw_dbg15
7
AC11
etk_d14
0
hsusb2_ data0
3
gpio_28
4
mm2_rxrcv
5
hw_dbg16
7
AD12
etk_d15
0
hsusb2_ data1
3
gpio_29
4
mm2_txse0
5
hw_dbg17
7
E16, F15, vdds_mem
0
F16, G15,
G16, H15, J6,
J7, J8, K6,
K7, K8
F12, F13, vdd_core
0
G12, G13,
H12, H13,
J17, J18,
K17, K18,
K19, L14,
L15, M14,
M15, R17,
R18, R19,
T17, T18,
T19, T20
F10, G9,
vdd_mpu_iva
0
G10, H9,
H10, J9, J10,
L11, L12, M6,
M7, M8, M12,
N6, N7, N8,
R6, R7, R8,
T7, T8, U12,
U13, V12,
V13, W12,
W13
H8
vdds_x
0
M17, M18, vdds
0
M19, N17,
N18, N19,
U10, V9, V10,
W9, W10, Y9
N24
vdds_mmc1
0
Y12
cap_vddu_
0
wkup_logic
U8
cap_vdd_sram_mpu_ 0
iva
H17
cap_vdd_sram_core 0
G18
vdda_dplls_dll
0
U17
vdda_dpll_per
0
AA12
vdds_sram
0
AA13
vdda_wkup_bg_bb 0
O
IO
IO
O
O
I
IO
O
O
I
IO
IO
O
O
IO
IO
IO
O
O
IO
IO
IO
O
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
BALL RESET BALL RESET RESET REL. POWER [8] HYS [9]
STATE [5] REL. STATE MODE [7]
[6]
L
L
4
vdds
Yes
L
L
4
vdds
Yes
L
L
4
vdds
Yes
L
L
4
vdds
Yes
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
BUFFER
PULLUP
STRENGTH /DOWN
(mA) [10] TYPE [11]
4
PU/ PD
4
PU/ PD
4
PU/ PD
4
PU/ PD
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
IO CELL [12]
LVCMOS
LVCMOS
LVCMOS
LVCMOS
-
-
-
-
-
-
-
-
-
-
-
-
-
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TERMINAL DESCRIPTION
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