AM3715_17 Datasheet, PDF (206/280 Pages) Texas Instruments – Sitara ARM Microprocessors

AM3715, AM3703
SPRS616F – JUNE 2010 – REVISED AUGUST 2011
www.ti.com
Table 6-39. DSS Timing Conditions—RFBI Mode—MIPI DBI 2.0 - LCD Panel⁽²⁾
TIMING CONDITION PARAMETER
VALUE
UNIT
MIN
MAX
Input Conditions
t_R
Input signal rise time
t_F
Input signal fall time
Output Condition
C_LOAD
Output load capacitance⁽¹⁾
15
ns
15
ns
30
pF
(1) Buffer strength configuration: LB0 = 1.
(2) For any information regarding the RFBI registers configuration, see Display Subsystem / the Display Subsystem Environment / LCD
Support / Parallel Interface / Parallel Interface in RFBI Mode (MIPI DBI Protocol) / Transaction Timing Diagrams section of the
AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4).
Table 6-40. DSS Timing Requirements—RFBI Mode—MIPI DBI 2.0 - LCD Panel
NO.
PARAMETER
DR0 t_su(dV-rdH)
Setup time, input data rfbi_da[15:0] valid to output
read enable rfbi_rd high
DR1 t_h(rdH-dIV)
Hold time, output read enable rfbi_rd high to input data
rfbi_da[15:0] invalid
t_{d(Data sampled)} Input data rfbi_da[15:0] sampled at the end of the
access time
(1) N = (AccessTime) * (TimeParaGranularity + 1) * L4CLK
OPP100
MIN
MAX
7.3
10.6
N⁽¹⁾
OPP50
MIN
MAX
6.3
9.6
N⁽¹⁾
UNIT
ns
ns
ns
t_w(wrH)
t_w(wrL)
t_d(a0-wrL)
t_d(wrH-a0)
t_d(csx-wrL)
t_d(wrH-csxH)
t_d(dV)
t_d(a0H-rdL)
t_d(rdlH-a0)
t_w(rdH)
t_w(rdL)
t_d(rdL-csxL)
t_d(rdH-csxH)
t_R(wr)
t_F(wr)
t_R(a0)
t_F(a0)
t_R(csx)
Table 6-41. DSS Switching Characteristics— RFBI Mode— MIPI DBI 2.0 - LCD Panel
PARAMETER
Pulse duration, output write enable rfbi_wr high
Pulse duration, output write enable rfbi_wr low
Delay time, output command/data control rfbi_a0 transition to
output write enable rfbi_wr low
Delay time, output write enable rfbi_wr high to output
command/data control rfbi_a0 transition
Delay time, output chip select rfbi_csx⁽¹⁴⁾ low to output write
enable rfbi_wr low
Delay time, output write enable rfbi_wr high to output chip select
rfbi_csx⁽¹⁴⁾ high
Output data rfbi_da[15:0] valid
Delay time, output command/data control rfbi_a0 high to output
read enable rfbi_rd low
Delay time, output read enable rfbi_rd high to output
command/data control rfbi_a0 transition
Pulse duration, output read enable rfbi_rd high
Pulse duration, output read enable rfbi_rd low
Delay time, output read enable rfbi_rd low to output chip select
rfbi_csx⁽¹⁴⁾ low
Delay time, output read enable rfbi_rd high to output chip select
rfbi_csx⁽¹⁴⁾ high
Rise time, output write enable rfbi_wr
Fall time, output write enable rfbi_wr
Rise time, output command/data control rfbi_a0
Fall time, output command/data control rfbi_a0
Rise time, output chip select rfbi_csx⁽¹⁴⁾
OPP100
MIN
MAX
A⁽¹⁾
B⁽²⁾
C⁽³⁾
D⁽⁴⁾
E⁽⁵⁾
F⁽⁶⁾
G⁽⁷⁾
H⁽⁸⁾
I⁽⁹⁾
J⁽¹⁰⁾
K⁽¹¹⁾
L⁽¹²⁾
M⁽¹³⁾
10
10
10
10
10
OPP50
MIN
MAX
A⁽¹⁾
B⁽²⁾
C⁽³⁾
D⁽⁴⁾
E⁽⁵⁾
F⁽⁶⁾
G⁽⁷⁾
H⁽⁸⁾
I⁽⁹⁾
J⁽¹⁰⁾
K⁽¹¹⁾
L⁽¹²⁾
M⁽¹³⁾
10
10
10
10
10
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
206 Timing Requirements and Switching Characteristics
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