AMC7812B_14 Datasheet, PDF (78/93 Pages) Texas Instruments – 12-Bit Analog Monitoring and Control Solution with Multichannel ADC, DACs, and Temperature Sensors

AMC7812B
SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013
Temperature Threshold Registers
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LT-High-Threshold Register (Read or Write, Address = 62h, Default = 07FFh, +255.875°C)
MSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
0
0
0
0 THRH THRH
11
10
BIT 9
THRH
9
BIT 8
THRH
8
BIT 7
THRH
7
BIT 6
THRH
6
BIT 5
THRH
5
BIT 4
THRH
4
BIT 3
THRH
3
BIT 2
THRH
2
BIT 1
THRH
1
LSB
BIT 0
THRH
0
Bits[15:12] are ‘0' when read back. Writing these bits causes no change
LT-Low-Threshold Register (Read or Write, Address = 63h, Default = 0800h, –256°C)
MSB
BIT 15
0
BIT 14
0
BIT 13 BIT 12 BIT 11
0
0 THRL
11
BIT 10
THRL
10
BIT 9
THRL
9
BIT 8
THRL
8
BIT 7
THRL
7
BIT 6
THRL
6
BIT 5
THRL
5
BIT 4
THRL
4
BIT 3
THRL
3
BIT 2
THRL
2
BIT 1
THRL
1
LSB
BIT 0
THRL
0
Bits[15:12] are reserved. Writing to these bits causes no change. Reading these bits returns '0'.
D1-High-Threshold Register (Read or Write, Address = 64h, Default = 07FFh, +255.875°C)
MSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
0
0
0
0
THRH THRH
11
10
BIT 9
THRH
9
BIT 8
THRH
8
BIT 7
THRH
7
BIT 6
THRH
6
BIT 5
THRH
5
BIT 4
THRH
4
BIT 3
THRH
3
BIT 2
THRH
2
BIT 1
THRH
1
LSB
BIT 0
THRH
0
Bits[15:12] are ‘0' when read back. Writing these bits causes no change.
D1-Low-Threshold Register (Read or Write, Address = 65h, Default = 0800h, –256°C)
MSB
BIT 15
0
BIT 14
0
BIT 13 BIT 12 BIT 11
0
0
THRL
11
BIT 10
THRL
10
BIT 9
THRL
9
BIT 8
THRL
8
BIT 7
THRL
7
BIT 6
THRL
6
BIT 5
THRL
5
BIT 4
THRL
4
BIT 3
THRL
3
BIT 2
THRL
2
BIT 1
THRL
1
LSB
BIT 0
THRL
0
Bits[15:12] are ‘0' when read back. Writing these bits causes no change.
D2-High-Threshold Register (Read or Write, Address = 66h, Default = 07FFh, +255.875°C)
MSB
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
0
0
0
0
THRH THRH
11
10
BIT 9
THRH
9
BIT 8
THRH
8
BIT 7
THRH
7
BIT 6
THRH
6
BIT 5
THRH
5
BIT 4
THRH
4
BIT 3
THRH
3
BIT 2
THRH
2
BIT 1
THRH
1
LSB
BIT 0
THRH
0
Bits[15:12] are ‘0' when read back. Writing these bits causes no change.
D2-Low-Threshold Register (Read or Write, Address = 67h, Default = 0800h, –256°C)
MSB
BIT 15
0
BIT 14
0
BIT 13 BIT 12 BIT 11
0
0
THRL
11
BIT 10
THRL
10
BIT 9
THRL
9
BIT 8
THRL
8
BIT 7
THRL
7
BIT 6
THRL
6
BIT 5
THRL
5
BIT 4
THRL
4
BIT 3
THRL
3
BIT 2
THRL
2
BIT 1
THRL
1
LSB
BIT 0
THRL
0
Bits[15:12] are ‘0' when read back. Writing these bits causes no change.
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