AMC7812B_14 Datasheet, PDF (11/93 Pages) Texas Instruments – 12-Bit Analog Monitoring and Control Solution with Multichannel ADC, DACs, and Temperature Sensors

AMC7812B
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I²C-COMPATIBLE TIMING DIAGRAMS
S
SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013
Sr
P
S
SDA
t_LOW
t_{SU, DAT}
t_{HD, DAT}
t_{SU, STA}
t_{HD, STA}
t_{SU, STO}
t_BUF
SCL
t_HD,STA
t_HIGH
t_R
t_F
= Resistor Pull-Up
S = START Condition
Sr = Repeated START Condition
P = STOP Condition
Figure 1. Timing for Standard and Fast Mode Devices on the I²C Bus
TIMING CHARACTERISTICS: SDA and SCL for Standard and Fast Modes⁽¹⁾
At –40°C to +105°C, AV_DD = DV_DD = 4.5 V to 5.5 V, AGND = DGND = 0 V, and IOV_DD = 2.7 V to 5.5 V, unless otherwise
noted.
STANDARD MODE
FAST MODE
f_SCL ⁽²⁾
t_LOW
t_HIGH
t_{SU, STA}
t_{HD, STA}
PARAMETER
SCL clock frequency
Low period of the SCL clock
High period of the SCL clock
Set-up time for a repeated start condition
Hold time (repeated) start condition. After this
period, the first clock pulse is generated
MIN
MAX
0
100
4.7
—
4.0
—
4.7
—
4.0
—
MIN
MAX UNIT
0
400 kHz
1.3
—
µs
0.6
—
µs
0.6
—
µs
0.6
—
µs
t_{SU, DAT}
t_{HD, DAT}
t_{SU, STO}
t_R
t_F
t_BUF
C_B
t_SP
Data set-up time
Data hold time for I²C-bus devices
Set-up time for stop condition
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Bus-free time between a stop and start condition
Capacitive load for each bus line
Pulse duration of spike suppressed
250
—
100
0
3.45
0
4.0
—
0.6
—
1000 20 + 0.1 C_B(3)
—
300 20 + 0.1 C_B(3)
4.7
—
1.3
—
400
—
N/A
N/A
0
—
ns
0.9
µs
—
µs
300
ns
300
ns
—
µs
400
pF
50
ns
(1) All values refer to V_IHmin and V_ILmax levels.
(2) An SCL operating frequency of at least 1 kHz is recommended to avoid activating the I²C timeout function. See the Timeout Function
section for details.
(3) C_B = total capacitance of one bus line in pF.
Copyright © 2013, Texas Instruments Incorporated
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