LMH0394_15 Datasheet, PDF (7/35 Pages) Texas Instruments – 3G HD/SD SDI Low Power Extended Reach Adaptive Cable Equalizer

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LMH0394
SNLS312M – AUGUST 2010 – REVISED JULY 2015
6.6 AC Electrical Characteristics
over supply voltage and operating temperature ranges, unless otherwise specified⁽¹⁾.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
BR_MIN
BR_MAX
Minimum input data rate
Maximum input data rate
SDI, SDI
SDI, SDI
2.97 Gbps, Belden 1694A,
0-100 meters⁽²⁾
125
Mbps
2970 Mbps
0.2
UI
2.97 Gbps, Belden 1694A,
100-140 meters⁽²⁾
0.3
UI
2.97 Gbps, Belden 1694A,
140-180 meters⁽²⁾
0.5
UI
TJ_RAW
Jitter for various cable lengths
2.97 Gbps, Belden 1694A,
180-200 meters
0.55
UI
1.485 Gbps, Belden 1694A,
0-200 meters⁽²⁾
0.2
UI
1.485 Gbps, Belden 1694A,
200-220 meters
0.3
UI
270 Mbps, Belden 1694A,
0-400 meters⁽²⁾
0.3
UI
t_R, t_F
ΔT_{R_F}
t_OS
RL_IN
Output rise time, fall time
Mismatch in rise / fall time
Output overshoot
Input return loss
SDO, SDO, 20% – 80%, and
100-Ω load Figure 1⁽³⁾
SDO, SDO ⁽³⁾
SDO, SDO ⁽³⁾
5 MHz - 1.5 GHz⁽⁴⁾ SDI or SDI
1.5 GHz - 3.0 GHz⁽⁴⁾ SDI or SDI
90
130
ps
2
15
ps
1%
5%
15
dB
10
dB
R_IN
Input resistance
C_IN
Input capacitance
single-ended SDI or SDI
single-ended SDI or SDI
1.5
kΩ
0.7
pF
(1) Typical values are stated for V_CC = 2.5 V and T_A = 25°C.
(2) Based on design and characterization data over the full range of recommended operating conditions of the device. Jitter is measured in
accordance with ST RP 184, ST RP 192, and the applicable serial data transmission standard: ST 424, ST 292, or ST 259.
(3) Specification is ensured by characterization.
(4) Input return loss is dependent on board design. The LMH0394 exceeds this specification on the SD394EVK evaluation board with a
return loss network consisting of a 5.6-nH inductor in parallel with a 75-Ω series resistor on the input.
6.7 SPI Interface AC Electrical Characteristics
over supply voltage and operating temperature ranges, unless otherwise specified⁽¹⁾.
PARAMETER
TEST CONDITIONS
MIN
Recommended Input Timing Requirements
f_SCK
SCK frequency
t_PH
SCK pulse width high
See Figure 2 and Figure 3
40
t_PL
SCK pulse width low
40
t_SU
MOSI set-up time
t_H
MOSI hold time
t_SSSU
SS set-up time
t_SSH
SS hold time
t_SSOF
SS OFF-time
Switching Characteristics
See Figure 2 Figure 3
4
4
See Figure 2 and Figure 3
14
4
1
t_ODZ
MISO driven-to-TRI-STATE time See Figure 3
t_OZD
MISO TRI-STATE-to-driven time
t_OD
MISO output delay time
(1) Typical values are stated for V_CC = 2.5 V and T_A = 25°C.
TYP
MAX UNIT
20 MHz
% SCK
period
% SCK
period
ns
ns
ns
ns
SCK period
20
ns
10
ns
15
ns
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