English
Language : 

LMH0394_15 Datasheet, PDF (16/35 Pages) Texas Instruments – 3G HD/SD SDI Low Power Extended Reach Adaptive Cable Equalizer
LMH0394
SNLS312M – AUGUST 2010 – REVISED JULY 2015
www.ti.com
Programming (continued)
7.5.1.6 SPI Daisy-Chain Read
Figure 12 shows the SPI daisy-chain read for a daisy-chain of N devices. The SPI daisy-chain read is 32xN bits
long, consisting of 16xN bits for the read transaction followed by 16xN bits for the dummy read transaction (all
“1”s) to shift out the read data on the MISO output. The SS signal is driven low and SCK is toggled for 16xN
clocks. The first 16xN bit MOSI payload (sent to Device 1 in the daisy-chain) consists of the 16-bit SPI read data
for Device N (the last device in the chain), followed by the read data for Device –1, Device –2, etc., ending with
the read data for Device 1 (the first device in the chain). The 16-bit SPI read data for each device consists of a
“1” (read command), seven address bits, and eight “1”s (which are ignored). After the first 16xN bit transaction,
SS must return high (to latch the data) and then is driven low again before the second 16xN bit transaction of all
“1”s is sent to the MOSI input. The requested read data is shifted out on MISO starting with the data for Device N
and ending with the data for Device 1. After this transaction, SS must return high.
SPI Read Data
1 A6 A5 A4 A3 A2 A1 A0
³8x1´
SS
(host)
SCK
(host)
MOSI
(host)
MISO
(host)
Device N
Read Data
16xN clocks
Device N-1
Read Data
'21¶7&$5(
Device 1
Read Data
³16x1´
16xN clocks
³16x1´
Device N
Read Data
Device N-1
Read Data
³16x1´
Device 1
Read Data
SPI Read Data
1 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Figure 12. SPI Daisy-Chain Read
7.5.1.7 SPI Daisy-Chain Read and Write Example
The following example further clarifies LMH0394 SPI daisy-chain operation. Assume a daisy-chain of three
LMH0394 devices (Device 1, Device 2, and Device 3), with Device 1 as the first device in the chain and Device 3
as the last device in the chain, as shown by the first three devices in Figure 10. Because there are three devices
in the daisy-chain, each SPI transaction is 48-bits long.
This example shows an SPI operation combining SPI reads and writes in order to accomplish the following three
tasks:
1. Write 0x22 to register 0x01 of Device 3 in order to set the output swing to 400 mVP-P.
2. Read the contents of register 0x00 of Device 2.
3. Write 0x10 to register 0x00 of Device 1 in order to force the sleep mode.
Figure 13 shows the two 48-bit SPI transactions required to complete these tasks (the bits are shifted in left to
right).
16
Submit Documentation Feedback
Product Folder Links: LMH0394
Copyright © 2010–2015, Texas Instruments Incorporated